Patents Examined by Than Nguyen
  • Patent number: 11966625
    Abstract: Provided are a memory device storing setting data and a memory system including the same. The memory device may include a cell array including a plurality of cell blocks, each including a plurality of pages, and a control logic that controls a program and read operation on the cell array, wherein at least one page of the cell array stores information data read (IDR) data including information related to a setting operation of the memory device, at least one other page of the cell array stores replica IDR data including inverted bit values of the IDR data, and the control logic controls a recovery operation for repairing errors in the IDR data by reading the replica IDR data when a read fail of the IDR data occurs.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: April 23, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Guyeon Han, Sangwon Park, Jinkyu Kang, Raeyoung Lee, Jaeduk Lee
  • Patent number: 11966591
    Abstract: Methods, apparatuses and systems related to managing deck-specific read levels are described. The apparatus may include a memory array having the memory cells organized into two or more decks. The apparatus can determine a delay between programming the decks. The apparatus can derive and implement the deck-specific read levels by selectively adjusting a base read level with an offset level according to the delay and/or the targeted read location.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Murong Lang, Tingjun Xie, Fangfang Zhu, Zhenming Zhou, Jiangli Zhu
  • Patent number: 11960768
    Abstract: Systems and techniques for a memory-side cache directory-based request queue are described herein. A memory request is received at an interface of a memory device. One or more fields of the memory request are written into an entry of a directory data structure. The identifier of the entry is pushed onto a queue. To perform the memory request, the identifier is popped off of the queue and a field of the memory request is retrieved from the entry of the directory data structure using the identifier. Then, a process on the memory request can be performed using the field retrieved from the entry of the directory data structure.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Tony M. Brewer, Dean E. Walker
  • Patent number: 11960770
    Abstract: Systems, apparatuses, and methods related to access request management using sub-commands. Access requests received from a host system can be managed using a respective set of sub-commands corresponding to each access request and whose status can be tracked. Tracking how far access requests are processed at a fine granularity (of sub-commands) can provide efficient management of the access requests that can reduce a gap latency in processing multiple access requests.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Simone Corbetta, Antonino Caprì, Emanuele Confalonieri
  • Patent number: 11954372
    Abstract: A technique efficiently migrates a live virtual disk (vdisk) across storage containers of a cluster having a plurality of nodes deployed in a virtualization environment. Each node is embodied as a physical computer with hardware resources, such as processor, memory, network and storage resources, that are virtualized to provide support for one or more user virtual machines (UVM) executing on the node. The storage resources include storage devices embodied as a storage pool that is logically segmented into the storage containers configured to store one or more vdisks. The storage containers include a source container having associated storage policies and a destination container having different (new) storage policies.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: April 9, 2024
    Assignee: Nutanix, Inc.
    Inventors: Kiran Tatiparthi, Mukul Sharma, Saibal Kumar Adhya, Sandeep Ashok Ghadage, Swapnil Ingle
  • Patent number: 11954031
    Abstract: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: April 9, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: David Symons, Ezequiel Alves
  • Patent number: 11947799
    Abstract: Described herein are systems and methods for performing TRIM commands in a data storage system. An example data storage system can include physical storage including a solid state drive (SSD), and a storage system computer operably coupled to the physical storage. The storage system computer can include a processing unit and a memory operably coupled to the processing unit. The data storage system can further include a distributed volume management (DVM) module stored in the memory that, when executed by the processing unit, causes the processing unit to: allocate a logical volume from the physical storage; subdivide the logical volume into a plurality of logical blocks; maintain a mapping table for tracking the logical blocks of the logical volume; and in response to a predetermined event, execute a TRIM command for one or more unused data blocks of the SSD.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 2, 2024
    Assignee: Amzetta Technologies, LLC
    Inventors: Paresh Chatterjee, Sharon Samuel Enoch, Venugopalreddy Mallavaram, Senthilkumar Ramasamy
  • Patent number: 11934698
    Abstract: Process isolation for a PIM device through exclusive locking includes receiving, from a process, a call requesting ownership of a PIM device. The request includes one or more PIM configuration parameters. The exclusive locking technique also includes granting the process ownership of the PIM device responsive to determining that ownership is available. The PIM device is configured according to the PIM configuration parameters.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: March 19, 2024
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Sooraj Puthoor, Muhammad Amber Hassaan, Ashwin Aji, Michael L. Chu, Nuwan Jayasena
  • Patent number: 11928350
    Abstract: A method, a computing device, and a non-transitory machine-readable medium for managing modes of operation for volumes in a node. A first portion of a plurality of volumes in a node is selected to operate in an active mode. A second portion of the plurality of volumes in the node is selected to operate in a passive mode. The second portion of the volumes that operates in the passive mode consumes fewer resources than the first portion of the volumes that operates in the active mode. The first portion of the plurality of volumes and the second portion of the plurality of volumes are adjusted over time based on activity of each volume of the plurality of volumes.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: March 12, 2024
    Assignee: NETAPP, INC.
    Inventors: Sushrut Bhowmik, Amit Panara, Sumith Makam, Vinay Kumar, Varun Simhadri, Sriram Venketaraman
  • Patent number: 11922029
    Abstract: A system includes a memory device including multiple memory cells and a processing device operatively coupled to the memory device. The processing device is to receive a first read command at a first time. The first read command is with respect to a set of memory cells of the memory device. The processing device is further to receive a second read command at a second time. The second read command is with respect to the set of memory cells of the memory device. The processing device is further to increment a read counter for the memory device by a value reflecting a difference between the first time and the second time. The processing device is further to determine that a value of the read counter satisfies a threshold criterion. The processing device is further to perform a data integrity scan with respect to the set of memory cells.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: March 5, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Jonathan S. Parry, Nicola Ciocchini, Animesh Roy Chowdhury, Akira Goda, Jung Sheng Hoei, Niccolo' Righetti, Ugo Russo
  • Patent number: 11922073
    Abstract: A Virtual Tape Emulation (VTE) application is able to be updated without disrupting IO operations by hosts on a set of virtual tape drives managed by the VTE application. When an old VTE application is to be replaced with a new VTE application, the new VTE application is provided with the same configuration information as the old VTE application. Each time a host unmounts a virtual tape from a virtual tape drive on the old VTE application, device management for that virtual tape drive is migrated from the old VTE application to the new VTE application. Specifically, path and channel information for the virtual tape drive is transferred to the new VTE application, and applied by the new VTE application to a respective device on the new VTE application. Once device management for all virtual tape drives has been transferred, the old VTE application is terminated.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Dell Products, L.P.
    Inventors: Andrey Markov, Yuri Kotov
  • Patent number: 11914882
    Abstract: Embodiments of a system and method to prevent mass deletion of data in a data storage system. A data deletion operation comprises a delete operation marking blocks to be deleted followed by a garbage collection (GC) operation to remove marked blocks from storage media. Based on historical information regarding deletions per GC cycle and certain user-defined thresholds based on data age, the storage system can detect any significant deviations as potentially dangerous. If a deletion in excess of a deviation threshold is detected, the next GC operation is skipped to provide a delay period during which time the user can investigate the data delete command and restore data if necessary. De-risking conditions such as known abnormal high deletion periods or new system installation can be used to override any garbage collection delay.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: February 27, 2024
    Assignee: Dell Products L.P.
    Inventors: Senthil Ponnuswamy, Mahadev Karadigudda, Madhu Agrahara Gopalakrishna, Praveen Kumar Lakkimsetti
  • Patent number: 11899931
    Abstract: A hardware-based processing node of an object memory fabric can comprise a memory module storing and managing one or more memory objects within an object-based memory space. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The memory module can provide an interface layer below an application layer of a software stack. The interface layer can comprise one or more storage managers managing hardware of a processor and controlling portions of the object-based memory space visible to a virtual address space and physical address space of the processor. The storage managers can further provide an interface between the object-based memory space and an operating system executed by the processor and an alternate object memory based storage transparent to software using the interface layer.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: February 13, 2024
    Assignee: Ultrata, LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 11899971
    Abstract: The embodiments provide a method for reading and writing and a memory device. The method includes: applying a read command to the memory device, the read command pointing to address information; reading data to be read out from a memory cell corresponding to the address information pointed to by the read command; and storing the address information pointed to by the read command into a memory bit of a preset memory space if an error occurs in the data to be read out, wherein the preset memory space is provided with a plurality of the memory bits, and each of the plurality of memory bits is associated with a spare memory cell.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: February 13, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shuliang Ning, Jun He, Zhan Ying, Jie Liu
  • Patent number: 11893262
    Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media for generating and maintaining an intelligent, web-based digital content clipboard for viewing and performing batch actions on copied content items. In particular, based on a client device request to copy a content item from a web-based folder, the disclosed systems can generate and add an item reference for the copied content item to a batch action clipboard. The disclosed systems can perform batch actions on multiple digital content items together with a single web-based batch action. The disclosed systems can also intelligently provide a clipboard element for display that is selectable to view item references representing content items copied to the batch action clipboard, along with a set of available batch actions for performing on one or more of the copied content items.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 6, 2024
    Assignee: Dropbox, Inc.
    Inventor: Stanley Yeung
  • Patent number: 11893274
    Abstract: A storage device according to the present technology may include a memory device for storing data, a buffer memory configured to temporarily store data to be stored in the memory device, and a memory controller configured to determine a delay time based on a plurality of parameters upon receipt of a write request from a host, and transmit a data request to the host after the delay time has elapsed.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: February 6, 2024
    Assignee: SK HYNIX INC.
    Inventor: Ki Tae Kim
  • Patent number: 11886712
    Abstract: A target block family of a plurality of block families is identified periodically every predetermined number of program erase cycles (PECs) of a memory device. Each block family includes a plurality of blocks. A respective temporal voltage shift of each block of a subset of blocks of the target block family from each die of a plurality of dies associated with the target block family is obtained. A respective die measurement for each respective die is obtained based on an average of the respective temporal voltage shifts of the subset of blocks from each die. Each respective die to a respective die family of a plurality of consecutive die families is assigned based on the respective die measurement for each respective die.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: January 30, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Steven Michael Kientz
  • Patent number: 11886731
    Abstract: A first cluster and a second cluster include at least one single-threaded main controller, the at least one single-threaded main controller processes one access request requesting for data at a time, and the data accessed by the access request is jointly managed by the first cluster and the second cluster. A database server determines hot data managed by the first cluster and determines whether a migration condition for migrating the hot data to the second cluster is met. The second cluster manages hot data that meets the migration condition. The database server migrates the hot data that meets the migration condition to the second cluster and triggers an update of an access path of the hot data.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 30, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Baolong Cui, Chenji Gong
  • Patent number: 11880298
    Abstract: One embodiment provides for a non-transitory machine-readable medium storing instructions to cause one or more processors to perform operations comprising receiving an instruction to dynamically allocate memory for an object of a data type and dynamically allocating memory for the object from a heap instance that is specific to the data type for the object, the heap instance including a memory allocator for the data type, the memory allocator generated at compile time for the instruction based on a specification of the data type for the heap instance.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: January 23, 2024
    Assignee: Apple Inc.
    Inventor: Filip J. Pizlo
  • Patent number: 11875043
    Abstract: To reduce spikes in the current used by a NAND memory die during a write operation using smart verify, different amounts of delay are introduced into the loops of the programing algorithm. Depending on the number of verify levels following a programming pulse, differing amounts of wait time are used before biasing a selected word line to the verify levels or levels. For example, if only a single verify level is used, a shorter delay is used than if two verify levels are used.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: January 16, 2024
    Assignee: SanDisk Technologies LLC
    Inventors: Abu Naser Zainuddin, Jiahui Yuan, Toru Miwa