Abstract: Defect-free field oxide isolation (34) is formed by oxidizing through a silicon nitride layer (30) which overlies the isolation regions (22) of the silicon substrate (12). Additionally, the silicon nitride layer (30) acts as a diffusion barrier during field growth, and thus inhibits the lateral diffusion of oxygen underneath the oxidation mask (18). Therefore, field oxide encroachment into the adjacent active regions is effectively reduced. Moreover, field oxide encroachment is also reproducibly controlled, and therefore integrated circuits with high device packing densities can be fabricated.
Abstract: A reduced-temperature two-step silicon deposition performed at different silicon sources is used in forming a composite monosilicon/polysilicon layer (20/24/26) on a body that contains a monosilicon region (10) and an adjoining dielectric regin (12). The first step entails selectively depositing silicon, preferably using dichlorosilane as a CVD silicon source, to grow a first monosilicon layer (20) on exposed monosilicon at an average body temperature less than or equal to 950.degree. C. Substantially no silicon accumulates on exposed dielectric material during the first step. The second step entails non-selectively depositing silicon, preferably using silane as a CVD silicon source, at an average body temperature less than or equal to 950.degree. C. to grow a second monosilicon layer (24) on the first monosilicon layer and to simultaneously grow a polysilicon layer (26) on the exposed dielectric material.
Type:
Grant
Filed:
December 19, 1990
Date of Patent:
May 5, 1992
Assignee:
North American Philips Corp.
Inventors:
Margareth C. Arst, Teh-Yi J. Chen, Kenneth N. Ritz, Shailesh S. Redkar