Patents Examined by Tyrone V. Walker
  • Patent number: 5825660
    Abstract: A method of optimizing a three-dimensional component layout in accordance with predetermined constraints is comprised of the steps of generating a plurality of models for each component. The plurality of models is arranged in a hierarchy from the model having the least resolution to the model having the most resolution. A starting layout is selected for the components. An iterative type of optimization routine is performed wherein each iteration is evaluated for satisfaction of the constraints using models for the components selected according to the level of resolution desired at that time in the iterative process. The optimization routine ends when a predetermined ending criterion is met.
    Type: Grant
    Filed: September 7, 1995
    Date of Patent: October 20, 1998
    Assignee: Carnegie Mellon University
    Inventors: Jonathan Cagan, Ashish Kolli, Simon Szykman, Robin Rutenbar
  • Patent number: 5819065
    Abstract: A system and method for emulating memory designs is described. The system includes a time sliced logic emulator. The time sliced logic emulator emulates the functions performed in one cycle of a target design by emulating portions of the functions in a set of time slices. That is, a set of time slices represents a single clock cycle in the target design. The system emulates many different types of memory designs included in the target design. The system includes an emulation memory. The memory designs are mapped to the emulation memory via a programmable address generation block. For a given time slice, the programmable address generation block generates an address that maps all or part of a memory design address to an emulation memory address. The programmable address generation block allows multiple memory designs to be mapped to a single emulation memory and allows a single memory design to be mapped to multiple emulation memories.
    Type: Grant
    Filed: February 6, 1996
    Date of Patent: October 6, 1998
    Assignee: Quickturn Design Systems, Inc.
    Inventors: John E. Chilton, Tony R. Sarno, Ingo Schaefer
  • Patent number: 5815416
    Abstract: In a computer implemented circuit simulator, a method is provided for measuring energy consumption of a circuit under test during a measurement interval. The method comprises a series of computer implemented steps. A supply voltage is applied to the circuit under test. A current flowing through the circuit under test is then measured. A mirror voltage, representative of the value of the current, is generated. A capacitor is charged, with a power parameter voltage equal to the product of the supply voltage and the mirror voltage, during the measurement interval. An accumulated voltage is measured across the capacitor, wherein the accumulated voltage is representative of energy consumed by the circuit under test.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: September 29, 1998
    Assignee: VLSI Technology, Inc.
    Inventors: Peter Liebmann, Michael N. Misheloff, David C. Chapman
  • Patent number: 5812823
    Abstract: A system and method for performing an emulation context switch save and restore in a processor that executes host applications and emulates guest applications. The processor includes an operating system and a first register that is saved and restored by the operating system during a host application context switch. The method and system comprises renaming the special-purpose register to the first register when emulating guest applications. When an emulation context switch occurs, a context save and restore of the special-purpose register is performed through the first register without operating system modification.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: September 22, 1998
    Assignee: International Business Machines Corporation
    Inventors: James Allan Kahle, Soummya Mallick, Arturo Martin-de-Nicolas
  • Patent number: 5812431
    Abstract: A method and apparatus simulates the performance of a system from a user-specified description of the components in the system and the interconnections between the components. The user may specify the descriptions using a consistent syntax. Conservation relations are automatically generated using the description of the components, the interconnections between the components in the system, or both. The description provided by the user and the conservation requirements generated may be translated into models for use by a conventional simulator to complete the simulation. Alternately the description and the conservation relation may be formulated into a set of relations and solved using conventional methods, such as Modified Nodal or Sparce Tableau. System performance simulation information is then generated as desired by a user.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: September 22, 1998
    Assignee: Cadence Design Systems, Inc.
    Inventor: Kenneth S. Kundert
  • Patent number: 5812432
    Abstract: An apparatus for synchronously controlling the actual operation of a machine using one or more motors, such as servo motors, by simulating in program form a combination of selectable machine mechanisms, including drivers, connecting shafts, clutches, gears and cams. Each such machine mechanism is represented by a virtual mechanism, preferably as a software module that contains information uniquely identifying the module, operation information that defines the generation of position information and connection information that defines other modules to which connection is made. The software modules comprise drive modules for generating position information, transmission modules for simulating the transmission mechanisms and output modules for outputting motor commands.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: September 22, 1998
    Assignee: Mistubishi Denki Kabushiki Kaisha
    Inventors: Yoshichika Takizawa, Yasuyuki Suzuki, Misako Okada, Makoto Nishimura, Hidehiko Matsumoto, Yasuharu Kudo, Tohru Tsujimoto
  • Patent number: 5808918
    Abstract: A hierarchical biological modelling system and method provides integrated levels of information synthesized from multiple sources. An executable model of a biological system is developed from information and structures based on the multiple sources. The model is balanced to ensure that it matches the information and structures. Once the model is created and balanced it can be used to provide insight into phenomena at the cellular, or subcellular level, as well as phenomena at the patient, organ and system levels. From this information clinical trials can be emulated, biologic targets for drug development can be identified and subcellular phenomena over time can be observed. The model provides an integrated view of a multi-variable biological system.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: September 15, 1998
    Assignee: Medical Science Systems, Inc.
    Inventors: Pamela K. Fink, Kenneth S. Kornman
  • Patent number: 5809439
    Abstract: A triggering device for a vehicle safety device is provided with an acceleration sensor generating signals corresponding to a measured acceleration and a circuit processing the signals for generating a triggering signal when a predetermined threshold value for a vehicle collision is exceeded. To manufacture a triggering device of high security and reliability in an economical manner, the acceleration signals measured by the acceleration sensor are supplied to a threshold circuit having at least two threshold values for a specific vehicle. The threshold circuit activates a counter with a weighting factor that is increased from the first threshold value to the next threshold value. The counter adds received clock pulses to the given weighting factor and at each clock pulse is decremented by a count the weighting factor of which is below that of the first threshold value.
    Type: Grant
    Filed: July 12, 1995
    Date of Patent: September 15, 1998
    Assignee: Autoliv Development AB
    Inventor: Jurgen Damisch
  • Patent number: 5801971
    Abstract: A form simulation device comprising a bulk plasma analytical unit making an analysis of a bulk plasma region and calculating potential, density of particles and change of sheath length with time within plasma when RF bias is given there, a sheath plasma analytical unit deciding the type of incident particle on the basis of the obtained particle density, a surface reaction calculation unit deciding absorbed material on the surface of the material to be etched, which the incident particle collides with and deciding the type of reaction between the absorbed material and the incident particle decided by the sheath plasma analytical unit, and a form calculation unit calculating the form of the material to be etched depending on the type of reaction decided by said surface reaction calculation unit.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: September 1, 1998
    Assignee: NEC Corporation
    Inventor: Toshiyuki Ohta
  • Patent number: 5802479
    Abstract: A roof-mounted passenger position sensor array of capacitive coupling passenger position sensors, to determine position and motion of a passenger by analysis of distances of the passenger to the various sensors of the array and analysis of the changes of said distances with time.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: September 1, 1998
    Assignee: Advanced Safety Concepts, Inc.
    Inventors: Philip W. Kithil, Michael H. Barron, William C. McIntosh
  • Patent number: 5799169
    Abstract: A structure and a method allows I/O or memory addresses of hardware registers to be emulated in software by a central processing unit (CPU). In one embodiment, a first-in-first-out (FIFO) memory is provided to queue read and write operations of the emulated hardware registers. A programmable interrupt mask registers enables certain write operations to the emulated hardware registers to cause an interrupt at the CPU.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: August 25, 1998
    Assignee: Chromatic Research, Inc.
    Inventor: Paul E. Kalapathy
  • Patent number: 5798937
    Abstract: A method for forming one or more redundant vias (38a-38x) around a critical via (36) involves providing an integrated circuit design file (12) containing several overlay layers. Critical vias in the file (12) are identified via a step (16). Several redundant vias are serially placed around and connected in parallel to the critical via (36), and design rules are checked for each redundant via by performing steps (24-30). Redundant vias which do not violate design rules (26) are kept in a separate redundant overlay layer and added to the design of the integrated circuit. The added redundant vias increase the yield of the integrated circuit by bolstering the integrity of critical via connections.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: August 25, 1998
    Assignee: Motorola, Inc.
    Inventors: Gabriel Bracha, Eytan Weissberger, Yehuda Volpert, Ilan Algor
  • Patent number: 5796985
    Abstract: A data processing system which calculates timing delays in a circuit having a switching device (3). A computer processor (22) receives input describing a circuit and calculates the timing delays for each switching device (3) or stage. To perform each calculation the computer processor (22) models the circuit incorporating effective resistance R.sub.eff (24), Miller capacitance C.sub..mu. (7), and an associated Miller coefficient. The Miller coefficient is a defined by the behaviour of the model. The model is then reduced to a set of equations, the variables are determined, and the timing delay calculated. In one embodiment, successive stages are calculated to locate timing violations in circuit design. In alternate embodiments, models such as CRYSTAL (4) or the Sakurai model are enhanced by Miller capacitance considerations, however many other models may be used.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: August 18, 1998
    Assignee: Motorola, Inc.
    Inventors: Peter R. O'Brien, Richard Paul Wiley
  • Patent number: 5790972
    Abstract: A multi-stage method and apparatus for cooling the inlet air of internal combustion engine and gas turbine prime movers associated with various load applications comprising: generating and providing a multi-stage refrigerated cooling system associated with the air inlet of internal combustion engine and gas turbine prime movers which provides thermodynamic efficiencies in accordance with a divided psychrometric inlet air cooling path enthalpy curve; cascading the cooled refrigerant from stage to stage to cool primary or secondary refrigerant from a first cooling stage as a precooling heat transfer coolant to exchange against and subcool subsequent stages of primary or secondary refrigerant for cooling to the desired temperature; energizing power means to drive the prime mover and refrigerant cooling system; and adjusting the power means based on current energy costs to optimize net revenues to produce electricity or useful work from the prime mover application.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: August 4, 1998
    Inventor: Charles R. Kohlenberger
  • Patent number: 5787377
    Abstract: A control circuit for an air-bag mounted in a motor vehicle comprises an acceleration sensor for producing an acceleration signal indicative of acceleration of the vehicle, an ignition timing circuit for processing the acceleration signal to predict the time when a passenger's head will reach a front surface of the air-bag in fully deployed condition and producing a first air-bag deploying signal in accordance with the predicted time, and a damage discrimination circuit for processing the acceleration signal and judging the need of activation of the air-bag when the cumulative effect of the acceleration exceeds a predetermined limit. The damage discrimination circuit produces a second air-bag deploying signal when judging the need of activation of the air-bag. A so-called AND means is further employed which actually activates the air-bag when receiving the first and second air-bag deploying signals concurrently.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: July 28, 1998
    Assignee: Kanto Seiki Co. Ltd.
    Inventors: Kajiro Watanabe, Kazuyasu Kon, Shin-ichiro Tsurushima, Satoru Matsumori, Yasuo Saito, Kunihiro Kaneko, Katsushi Ohneda
  • Patent number: 5784289
    Abstract: A cell placement for a microelectronic integrated circuit includes a plurality of cells interconnected by nets of wiring. A method for estimating routing density in the placement includes superimposing a pattern of contiguous tiles over the placement, with each of the tiles having edges. Bounding boxes are constructed around the nets, and net probable densities are calculated within each bounding box for the wiring required by each net for each edge respectively. The net probable densities are summed to produce total probable densities of wiring required by all of the nets for each edge respectively. The net probable density for each edge is calculated as being equal to a wiring capacity of the edge divided by the sum of the wiring capacity of the edge and all other unobscured edges within the bounding box that are collinear with the edge respectively.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: July 21, 1998
    Assignee: LSI Logic Corporation
    Inventor: Deborah Chao Wang
  • Patent number: 5784301
    Abstract: Paper fiber structure data simulating the paper fiber structure required for drawing a bled figure, and a method and apparatus for drawing, based upon the paper fiber structure data, a bled figure which gives an impression as if the figure were actually drawn on a paper sheet with ink. Specifically, the paper fiber structure is modelled to form paper fiber structure data set for correspondence with respective pixels in a figure. The ink flow through the paper fiber interstices is modelled for forming picture data representing a bled figure based upon the paper fiber structure data. Based on the picture data, the picture of the bled figure is displayed on a display device.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: July 21, 1998
    Assignee: Sony Corporation
    Inventors: Qinglian Guo, Toshiyasu Kunii
  • Patent number: 5774696
    Abstract: A method for eliminating intersections between a substance boundary and triangles (or tetrahedra) of a triangle mesh (or tetrahedron mesh) which satisfies a condition of Delaunay partition and is used for a finite difference method. First, triangles intersecting with the substance boundary are searched out. One of the vertices of any of the triangles is selected as a moving node P and the moving node is projected to the substance boundary to obtain a projected point P'. Processing object triangles which commonly have the moving node and peripheral triangles which are positioned around the processing object triangles are listed. Then, checking to detect whether or not the projected point is included in a circumscribed circle about any of the peripheral triangles is performed. When the projected point is included in a circumscribed circle, a node is added at the projected point and triangles are produced using the node.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: June 30, 1998
    Assignee: NEC Corporation
    Inventor: Yutaka Akiyama
  • Patent number: 5774382
    Abstract: A method (10) for generating a table (26', 26") having independent (C.sub.L, e.sub.r) and dependent (P.sub.D) table model parameters is provided. An initial table (26) is generated by measuring actual values of the dependent table model parameters (P.sub.D) for corresponding independent table model parameters (C.sub.L, e.sub.r) and inserting the actual values into the initial table (26). Calculated table model parameters are generated by calculating values of the dependent table model parameters (P.sub.D) corresponding to independent table model parameters (C.sub.L, e.sub.r), wherein the corresponding independent table model parameters (C.sub.L, e.sub.r) are between the measured independent table model parameters (C.sub.L, e.sub.r). The calculated values are compared to measured values and if an error value exceeds a predetermined error tolerance level, the initial table (26) is updated by inserting the actual values of the dependent table model parameters (P.sub.
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: June 30, 1998
    Assignee: Motorola, Inc.
    Inventors: Sean C. Tyler, Timothy J. Jennings
  • Patent number: 5774819
    Abstract: In a vehicle steering control system, an actuating torque is applied to steerable wheels according to a steering torque applied to a steering wheel in a conventional manner, and an additional actuating torque is applied to the steering wheel by an electric motor according to lateral dynamic conditions of the vehicle so as to control the lateral stability of the vehicle even in the presence of external interferences such as crosswind. Such external interferences are detected as a lateral dynamic condition of the vehicle such as the yaw rate of the vehicle, and the steering control system produces a steering reaction which counteracts such a lateral dynamic condition by applying the additional actuating torque to the steerable wheels so that the vehicle may maintain a straight course in spite of such external interferences without requiring any intentional efforts by the vehicle operator.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 30, 1998
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yorihisa Yamamoto, Yutaka Nishi, Takashi Nishimori, Hiroyuki Tokunaga, Hideki Machino