Patents Examined by V Yeviskov
  • Patent number: 6368969
    Abstract: The polishing uniformity of a material on a substrate is improved by using a polishing method where an applied pressure on the backside of the substrate is changed during the polishing process. The method is especially useful for polishing thin material layers requiring precise control of polishing across the substrate, e.g., for TaSiN layers used in the formation of gate stacks and stacked capacitors.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: April 9, 2002
    Assignee: International Business Machines Corporation
    Inventors: Laertis Economikos, Fen Fen Jamin
  • Patent number: 6221765
    Abstract: Inside a groove are sequentially formed a barrier-metal film 3, a seed-metal film 4 and the first plating film 6. The thickness of the first plating film 6 is about 0.1 to 0.5 the width of the groove 5. After conducting the first annealing for about 5 hours at an ambient temperature or for about 30 min at 300° C. or higher, the second plating film 7 is formed, which is then subject to the second annealing for about 25 hours at an ambient temperature or for about 30 min at 300° C. or higher. Then, the surface of the substrate is smoothed by CMP to provide a semiconductor device.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: April 24, 2001
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Ueno