Patents Examined by Vernon P Webb
  • Patent number: 9683894
    Abstract: A spectroscopic sensor has plural angle limiting filters that limit incident angles of incident lights, plural light band-pass filters that transmit specific wavelengths, and plural photodiodes to which corresponding transmitted lights are input. The spectroscopic sensor is a semiconductor device in which the angle limiting filters, the light band-pass filters, and the photodiodes are integrated, and, assuming that the surface on which impurity regions for the photodiodes are formed is a front surface of a semiconductor substrate, holes for receiving lights are formed in the impurity regions from the rear surface side.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: June 20, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akira Uematsu, Noriyuki Nakamura, Akira Komatsu, Kunihiko Yano
  • Patent number: 9666635
    Abstract: Fingerprint sensing circuit packages and methods of making such packages may comprise a first substrate having a top side and a bottom side; the top side comprising a fingerprint image sensing side over which a user's fingerprint is swiped; the bottom side comprising a metal layer forming a fingerprint sensing circuit image sensor structure; and a sensor control circuit housed in a sensor control circuit package mounted on the metal layer. The sensor control circuit may comprise an integrated circuit die contained within the sensor control circuit package. The fingerprint sensing circuit package may also have a second substrate attached to the bottom side of the first substrate having a second substrate bottom side on which is placed connector members connecting the fingerprint sensing circuit package to a device using a fingerprint image generated from the fingerprint sensing circuitry contained in the fingerprint sensing circuitry package.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: May 30, 2017
    Assignee: Synaptics Incorporated
    Inventors: Richard Alex Erhart, Richard Brian Nelson, Erik Thompson, Armando Leon Perezselsky
  • Patent number: 9659962
    Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least two second gate electrodes comprising a second parameter, wherein the second parameter is different than the first parameter. The first parameter and the second parameter may comprise the thickness or the dopant profile of the gate electrode materials of the PMOS and NMOS transistors. The first and second parameter of the at least two first gate electrodes and the at least two second gate electrodes establish the work function of the PMOS and NMOS transistors, respectively.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: May 23, 2017
    Assignee: Infineon Technologies AG
    Inventors: Thomas Schulz, Hongfa Luan
  • Patent number: 9634277
    Abstract: The present invention provides a structure of a white OLED device that includes a plurality of emissive layers, of which at least one emissive layer is made of a quantum dot and at least one emissive layer is made of an organic light emission material so as to combine the advantages of the quantum dot and the organic light emission material, where the manufacturing cost is low, the utilization of material is high, and the light emission efficiency is high thereby increasing the brightness of a display device and providing excellent performance for use in flat panel display devices, televisions, and other fields of display.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: April 25, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Qinghua Zou
  • Patent number: 9605358
    Abstract: A silicon carbide substrate, a silicon carbide ingot, and methods for manufacturing the silicon carbide substrate and the silicon carbide ingot capable of improving a yield of a semiconductor device having silicon carbide as constituent material are provided. In the silicon carbide substrate, patterns formed by crossing straight lines extending along the <11-20> direction and being observable by means of an X-ray topography are present at a number density of less than or equal to 0.1 patterns/cm2 on one main surface. As described above, in the silicon carbide substrate, the number density of the crossing patterns present on the main surface is reduced to less than or equal to 0.1 patterns/cm2. Therefore, when the semiconductor device is manufactured with use of a silicon carbide substrate, a lowering of a yield caused by the crossing patterns can be suppressed.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: March 28, 2017
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Makoto Sasaki
  • Patent number: 9601400
    Abstract: A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 21, 2017
    Assignee: Semtech Corporation
    Inventors: Victor Hugo Cruz, David Francis Courtney
  • Patent number: 9595628
    Abstract: A radiation detector comprises a silicon body in which are defined vertical pores filled with a converter material and situated within silicon depletion regions. One or more charge-collection electrodes are arranged to collect current generated when secondary particles enter the silicon body through walls of the pores. The pores are disposed in low-density clusters, have a majority pore thickness of 5 ?m or less, and have a majority aspect ratio, defined as the ratio of pore depth to pore thickness, of at least 10.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: March 14, 2017
    Assignee: Sandia Corporation
    Inventors: Murat Okandan, Mark S. Derzon, Bruce L. Draper
  • Patent number: 9583609
    Abstract: Elongated metal contacts with longitudinal axes that lie in a first direction are formed to make electrical connections to elongated source and drain regions with longitudinal axes that lie in the first direction, and elongated metal contacts with longitudinal axes that lie a second direction are formed to make electrical connections to elongated source and drain regions with longitudinal axes that lie the second direction, where the second direction lies orthogonal to the first direction.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: February 28, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Russell Carlton McMullan, Kamel Benaissa
  • Patent number: 9583424
    Abstract: An embodiment integrated circuit structure includes a substrate, a metal pad over the substrate, a post-passivation interconnect (PPI) structure over the substrate and electronically connected to the metal pad, a first polymer layer over the PPI structure, an under bump metallurgy (UBM) extending into an opening in the first polymer layer and electronically connected to the PPI structure, and a barrier layer on a top surface of the first polymer layer adjacent to the UBM.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: February 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing-Cheng Lin, Jui-Pin Hung, Hsien-Wen Liu, Min-Chen Lin
  • Patent number: 9520486
    Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: December 13, 2016
    Assignee: Analog Devices, Inc.
    Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
  • Patent number: 9496460
    Abstract: Provided are a light emitting device, an electrode structure, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure layer comprising a first semiconductor layer, a second semiconductor layer, and an active layer. An electrode disposed on a top surface of the first semiconductor layer, a first layer includes a transmittive oxide material between the top surface of the first semiconductor layer and the electrode, and a second layer disposed is disposed between the first layer and the electrode, wherein the first layer is formed in a different material from the second layer, wherein the electrode comprises a lower portion connected to the first semiconductor layer and an upper portion on a top surface of the second layer.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: November 15, 2016
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song
  • Patent number: 9485589
    Abstract: This application relates to a systems and methods for enhanced dynamics processing of streaming audio by source separation and remixing for hearing assistance devices, according to one example. In one embodiment, an external streaming audio device processes sources isolated from an audio signal using source separation, and mixes the resulting signals back into the unprocessed audio signal to enhance individual sources while minimizing audible artifacts. Variations of the present system use source separation in a side chain to guide processing of a composite audio signal.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 1, 2016
    Assignee: Starkey Laboratories, Inc.
    Inventor: Kelly Fitz
  • Patent number: 9472684
    Abstract: A gallium nitride (GaN)-based junction field-effect transistor (JFET) can include a GaN drain region having a top surface extending in a lateral dimension, a source region, and a GaN channel region of a first conductivity type coupled between the source region and the GaN drain region and operable to conduct electrical current between the source region and the GaN drain region. The JFET can also include a blocking layer disposed between the source region and the GaN drain region such that the GaN channel region is operable to conduct the electrical current substantially along the lateral dimension in a laterally-conductive region of the GaN channel region, and a GaN gate region of a second conductivity type coupled to the GaN channel region such that the laterally-conductive region of the GaN channel region is disposed between at least a portion of the blocking layer and the GaN gate region.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: October 18, 2016
    Assignee: Avogy, Inc.
    Inventors: Hui Nie, Andrew Edwards, Isik Kizilyalli, Dave Bour, Thomas R. Prunty
  • Patent number: 9472629
    Abstract: A method of fabricating a single crystal gallium nitride substrate the step of cutting an ingot of single crystal gallium nitride along predetermined planes to make one or more signal crystal gallium nitride substrates. The ingot of single crystal gallium nitride is grown by vapor phase epitaxy in a direction of a predetermined axis. Each predetermined plane is inclined to the predetermined axis. Each substrate has a minor polished primary surface. The primary surface has a first area and a second area. The first area is between an edge of the substrate and a line 3 millimeter away from the edge. The first area surrounds the second area. An qaxis perpendicular to the primary surface forms an off-angle with c-axis of the substrate. The off-angle takes a minimum value at a first position in the first area of the primary surface.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 18, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki Ueno
  • Patent number: 9442021
    Abstract: We describe the use of a high-quality-factor torsional resonator of microscale dimensions. The resonator has a paddle that is supported by two nanoscale torsion rods made of a very low thermal conductivity material, such as amorphous (“a-”) silicon. The body of the torsion paddle is coated with an infrared-absorbing material that is thin and light weight, but provides sufficient IR absorption for the applications. It may be placed above a reflecting material of similar dimensions to form a quarter wave cavity. Sensing of the response of the paddle to applied electromagnetic radiation provides a measure of the intensity of the radiation as detected by absorption, and the resulting temperature change, in the paddle.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: September 13, 2016
    Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventor: Michael L. Roukes
  • Patent number: 9431543
    Abstract: A thin-film semiconductor device includes: a substrate; a gate electrode above the substrate; a gate insulation film above the gate electrode; a channel layer above the gate insulation film, the channel layer having a raised part; a channel protection layer over the raised part of the channel layer, the channel protection layer comprising an organic material, and the organic material including silicon, oxygen, and carbon; an interface layer at an interface between a top surface of the raised part of the channel layer and the channel protection layer, and comprises at least carbon and silicon that derive from the organic material; and a source electrode and a drain electrode each provided over a top surface and a side surface the channel protection layer, a side surface of the interface layer, a side surface of the raised part of the channel layer, and a top surface of the channel layer.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: August 30, 2016
    Assignees: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshirou Kawachi
  • Patent number: 9422639
    Abstract: A silicon carbide substrate, a silicon carbide ingot, and methods for manufacturing the silicon carbide substrate and the silicon carbide ingot capable of improving a yield of a semiconductor device having silicon carbide as constituent material are provided. In the silicon carbide substrate, patterns formed by crossing straight lines extending along the <11-20> direction and being observable by means of an X-ray topography are present at a number density of less than or equal to 0.1 patterns/cm2 on one main surface. As described above, in the silicon carbide substrate, the number density of the crossing patterns present on the main surface is reduced to less than or equal to 0.1 patterns/cm2. Therefore, when the semiconductor device is manufactured with use of a silicon carbide substrate, a lowering of a yield caused by the crossing patterns can be suppressed.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: August 23, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Makoto Sasaki
  • Patent number: 9406569
    Abstract: A semiconductor-on-insulator (SOI) substrate comprises a bulk semiconductor substrate, a buried insulator layer formed on the bulk substrate and an active semiconductor layer formed on the buried insulator layer. Impurities are implanted near the interface of the buried insulator layer and the active semiconductor layer. A diffusion barrier layer is formed between the impurities and an upper surface of the active semiconductor layer. The diffusion barrier layer prevents the impurities from diffusing therethrough.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: August 2, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Gregory G. Freeman, Kam Leung Lee, Chengwen Pei, Geng Wang, Yanli Zhang
  • Patent number: 9370047
    Abstract: Apparatuses and techniques relating to a resistive heating device are provided.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: June 14, 2016
    Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventor: Kwangyeol Lee
  • Patent number: 9357956
    Abstract: A spectroscopic sensor has plural angle limiting filters that limit incident angles of incident lights, plural light band-pass filters that transmit specific wavelengths, and plural photodiodes to which corresponding transmitted lights are input. The spectroscopic sensor is a semiconductor device in which the angle limiting filters, the light band-pass filters, and the photodiodes are integrated, and, assuming that the surface on which impurity regions for the photodiodes are formed is a front surface of a semiconductor substrate, holes for receiving lights are formed in the impurity regions from the rear surface side.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: June 7, 2016
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akira Uematsu, Noriyuki Nakamura, Akira Komatsu, Kunihiko Yano