Patents Examined by Vu A. Le
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Patent number: 11848071Abstract: Disclosed are systems and methods involving memory-side write training to improve data valid window. In one implementation, a method for performing memory-side write training may comprise delaying a rising edge or a falling edge of a first data signal, delaying a rising edge or a falling edge of a second data signal, and aligning the two adjusted signals to reduce a window of time that the data signals are not valid and thereby improve or optimize the data valid window (DVW) of a memory array. According to implementations herein, various edges of data signals and clock signals may be adjusted or delayed via dedicated trim cells or circuitry present in the data paths located on the memory side of a system.Type: GrantFiled: December 8, 2021Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Agatino Massimo Maccarrone, Luigi Pilolli, Ali Feiz Zarrin Ghalam, Chin Yu Chen
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Patent number: 11848058Abstract: A method for operating a memory is disclosed. The memory includes a first group of word lines, a second group of word lines, a first dummy word line, and a second dummy word line. The first dummy word line and the second dummy word line are between the first group of word lines and the second group of word lines. A first pass voltage is applied to the first dummy word line and applying a second pass voltage to the second dummy word line. A program voltage is applied to a selected word line, wherein a condition is met: a first voltage difference between the first pass voltage and a first threshold voltage of a first dummy cell corresponding to the first dummy word line is different from a second voltage difference between the second pass voltage and a second threshold voltage of a second dummy cell corresponding to the second dummy word line.Type: GrantFiled: March 7, 2023Date of Patent: December 19, 2023Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Yali Song, Jianquan Jia, Kaikai You, An Zhang, Xiangnan Zhao, Ying Cui, Shan Li, Kaiwei Li, Lei Jin, Xueqing Huang, Meng Lou, Jinlong Zhang
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Patent number: 11847917Abstract: The disclosure extends to methods, systems, and apparatuses for automated fixation generation and more particularly relates to generation of synthetic saliency maps. A method for generating saliency information includes receiving a first image and an indication of one or more sub-regions within the first image corresponding to one or more objects of interest. The method includes generating and storing a label image by creating an intermediate image having one or more random points. The random points have a first color in regions corresponding to the sub-regions and a remainder of the intermediate image having a second color. Generating and storing the label image further includes applying a Gaussian blur to the intermediate image.Type: GrantFiled: July 9, 2021Date of Patent: December 19, 2023Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Madeline Jane Schrier, Vidya Nariyambut Murali
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Patent number: 11848051Abstract: Methods, systems, and devices for parallel drift cancellation are described. In some instances, during a first duration, a first voltage may be applied to a word line to threshold one or more memory cells included in a first subset of memory cells. During a second duration, a second voltage may be applied to the word line to write a first logic state to one or more memory cells included in the first subset and to threshold one or more memory cells included in a second subset of memory cells. During a third duration, a third voltage may be applied to the word line to write a second logic state to one or more memory cells included in the second subset of memory cells.Type: GrantFiled: September 22, 2022Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventor: Fabio Pellizzer
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Patent number: 11839428Abstract: Disclosed is a method for analyzing a distribution of retinal lesions in a mouse model, including: scanning a mouse posterior polar fundus based on optical coherence tomography (OCT), and acquiring lesion images of the mouse posterior polar fundus; acquiring lesion distribution coordinates based on the lesion images of the mouse posterior polar fundus; constructing a coordinate map of a lesion distribution rule based on the lesion distribution coordinates; and acquiring lesion distribution in quadrants based on the coordinate map of the lesion distribution rule, and calculating and counting a number of lesions in each quadrant.Type: GrantFiled: May 1, 2023Date of Patent: December 12, 2023Assignee: JOINT SHANTOU INTERNATIONAL EYE CENTER OF SHANTOU UNIVERSITY AND THE CHINESE UNIVERSITY OF HONG KONGInventors: Haoyu Chen, Xiaoting Mai, Shaofen Huang, Meiqin Zhang
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Patent number: 11842791Abstract: Multilevel command and address (CA) signals are used to provide commands and memory addresses from a controller to a memory system. Using multilevel signals CA signals may allow for using fewer signals compared to binary signals to represent a same number of commands and/or address space, or using a same number of multilevel CA signals to represent a larger number of commands and/or address space. A number of external command/address terminals may be reduced without reducing a set of commands and/or address space. Alternatively, a number of external terminals may be maintained, but provide for an expanded set of commands and/or address space.Type: GrantFiled: June 3, 2022Date of Patent: December 12, 2023Inventor: Kang-Yong Kim
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Patent number: 11837286Abstract: Memory devices have an array of elements in two or more dimensions. The memory devices use multiple access lines arranged in a grid to access the memory devices. Memory cells are located at intersections of the access lines in the grid. Drivers are used for each access line and configured to transmit a corresponding signal to respective memory cells of the plurality of memory cells via a corresponding access line. The memory devices also include compensation circuitry configured to determine which driving access lines driving a target memory cell of the plurality of memory cells has the most distance between the target memory cell and a respective driver. The plurality of access lines comprise the driving access lines. The compensation circuitry also is configured to output compensation values to adjust the voltages of the driving access lines based on a polarity of the voltage of the longer driving access line.Type: GrantFiled: October 13, 2022Date of Patent: December 5, 2023Assignee: Micron Technology, Inc.Inventor: John Christopher Sancon
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Patent number: 11837285Abstract: A method of correcting bias temperature instability in memory arrays may include applying a first bias to a memory cell, where the memory cell may include a memory element and a select element, and the first bias may causes a value to be stored in the memory element. The first bias causes a bias temperature instability (BTI) associated with the memory cell to increase. The method may also include applying a second bias to the memory cell, where the second bias may have a polarity that is opposite of the first bias, and the value stored in the memory element remains in the memory element after the second bias is applied. The second bias may also cause the BTI associated with the memory cell to decrease while maintaining any value stored in the memory cell.Type: GrantFiled: August 22, 2021Date of Patent: December 5, 2023Assignee: Applied Materials, Inc.Inventors: Christophe J. Chevallier, Siddarth Krishnan
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Patent number: 11830246Abstract: A system may be configured to collect geospatial features (in vector form) such that a software application is operable to edit an object represented by at least one vector. Some embodiments may: generate, via a trained machine learning model, a pixel map based on an aerial or satellite image; convert the pixel map into vector form; and store the vectors. This conversion may include a raster phase and a vector phase. A system may be configured to obtain another image, generate another pixel map based on the other image, convert the other pixel map into vector form, and compare the vectors to identify changes between the images. Some implementations may cause identification, based on a similarity with converted vectors, of a more trustworthy set of vectors for subsequent data source conflation.Type: GrantFiled: May 1, 2020Date of Patent: November 28, 2023Assignee: CACI, Inc.—FederalInventors: Jacob A. Fleisig, Evan M. Colvin, Peter Storm Simonson, Nicholas Grant Chidsey
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Patent number: 11830548Abstract: The present disclosure relates to a memory device comprising a plurality of memory cells, each memory cell being programmable to a logic state corresponding to a threshold voltage exhibited by the memory cell in response to an applied voltage, and a logic circuit portion operatively coupled to the plurality of memory cells, wherein the logic circuit portion is configured to scan memory addresses of the memory device, and to generate seasoning pulses to be applied to the addressed pages of the memory device. A related electronic system and related methods are also disclosed.Type: GrantFiled: March 29, 2022Date of Patent: November 28, 2023Assignee: Micron Technology, Inc.Inventors: Paolo Amato, Marco Sforzin
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Patent number: 11830575Abstract: Multilevel command and address (CA) signals are used to provide commands and memory addresses from a controller to a memory system. Using multilevel signals CA signals may allow for using fewer signals compared to binary signals to represent a same number of commands and/or address space, or using a same number of multilevel CA signals to represent a larger number of commands and/or address space. A number of external command/address terminals may be reduced without reducing a set of commands and/or address space. Alternatively, a number of external terminals may be maintained, but provide for an expanded set of commands and/or address space.Type: GrantFiled: June 3, 2022Date of Patent: November 28, 2023Inventor: Kang-Yong Kim
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Patent number: 11823737Abstract: Devices, systems and methods for adaptively controlling a reset current of a memory cell are described. A system comprises: a mirror circuit with one branch coupled with a top electrode of the memory cell and the other branch coupled with one end of a resistive reference, and wherein a bottom electrode of the memory cell is coupled to a reference potential, the other end of the resistive reference is provided with a first electric potential; a control circuit; and a feedback circuit for feeding an electric potential to the top electrode of the memory cell.Type: GrantFiled: May 18, 2020Date of Patent: November 21, 2023Assignee: Micron Technology, Inc.Inventors: Marco Sforzin, Umberto Di Vincenzo
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Patent number: 11823384Abstract: Disclosed is a CT image generation method for attenuation correction of PET images. According to the method, a CT image and a PET image at T1 and a PET image at T2 are acquired and input into a trained deep learning network to obtain a CT image at T2; the CT image can be applied to the attenuation correction of the PET image, thereby obtaining more an accurate PET AC (Attenuation Correction) image. According to the CT image generation method for attenuation correction of PET images, the dosage of X-rays received by a patient in the whole image acquisition stage can be reduced, and physiological and psychological pressure of the patient is relieved. In addition, the later image acquisition only needs a PET imaging device, without the need of PET/CT device, cost of imaging resource distribution can be reduced, and the imaging expense of the whole stage is reduced.Type: GrantFiled: January 23, 2021Date of Patent: November 21, 2023Assignees: ZHEJIANG LAB, MINFOUND MEDICAL SYSTEMS CO., LTDInventors: Fan Rao, Wentao Zhu, Bao Yang, Ling Chen, Hongwei Ye
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Patent number: 11823388Abstract: A farming machine moves through a field and includes an image sensor that captures an image of a plant in the field. A control system accesses the captured image and applies the image to a machine learned plant identification model. The plant identification model identifies pixels representing the plant and categorizes the plant into a plant group (e.g., plant species). The identified pixels are labeled as the plant group and a location of the pixels is determined. The control system actuates a treatment mechanism based on the identified plant group and location. Additionally, the images from the image sensor and the plant identification model may be used to generate a plant identification map. The plant identification map is a map of the field that indicates the locations of the plant groups identified by the plant identification model.Type: GrantFiled: January 9, 2023Date of Patent: November 21, 2023Assignee: BLUE RIVER TECHNOLOGY INC.Inventors: Christopher Grant Padwick, William Louis Patzoldt, Benjamin Kahn Cline, Olgert Denas, Sonali Subhash Tanna
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Patent number: 11823412Abstract: A method for generating and evaluating N-to-1 mappings, between spatial point sets in nD, n=2 or 3 implemented on a computing device comprising a programmable general purpose processor and a programmable data-parallel coprocessor and a memory coupled with them. Embodiments comprises using the computing device to receive a first and a second spatial point sets, the first spatial point set comprising a first non-empty portion of non-isolated points and a second non-empty portion of constrained points, an array of fixed correspondents for the second non-empty portion, and a CCISS or padded CCISS between the first non-isolated portion and the second spatial point set, and use these to generate an array of N-to-1 mappings between the first portion of non-isolated points and the second spatial point set, an array of overall distance measures for the array of N-to-1 mappings, and an optimal N-to-1 mapping with the lowest overall distance measure.Type: GrantFiled: November 30, 2020Date of Patent: November 21, 2023Inventor: Tianzhi Yang
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Patent number: 11823738Abstract: A resistive memory apparatus including bit lines, word lines, a memory array, bypass paths, select circuits, and a switch circuit is provided. The word lines are respectively crossed with the bit lines. The memory array includes memory elements. One end of each of the memory elements is coupled to the corresponding word line, and another end of each of the memory elements is coupled between a first node and a second node on the corresponding bit line. Each of the bypass paths is connected in parallel with the corresponding bit line between the first node point and the second node. Each of the select circuits is coupled to the corresponding bit line and bypass path, and configured to select the coupled bit line or bypass path. The switch circuit is coupled to the word lines, and configured to select one of the word lines.Type: GrantFiled: December 2, 2021Date of Patent: November 21, 2023Assignee: Winbond Electronics Corp.Inventors: Frederick Chen, Hsiu-Han Liao, Po-Yen Hsu, Chi-Shun Lin
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Patent number: 11823728Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.Type: GrantFiled: March 4, 2022Date of Patent: November 21, 2023Assignee: Apple Inc.Inventors: Liang Deng, Norman J. Rohrer, Yizhang Yang, Arpit Mittal
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Patent number: 11817146Abstract: A phase-change memory (10) for the non-volatile storage of binary contents stores the binary contents electrically and/or optically in a non-volatile manner by locally switching a material (18) between an amorphous and a crystalline phase. The state with respect to the electrical conductivity of the material (18) and/or the reflection properties of the material (18) determines the information content of the phase-change memory (10). A method for non-volatile storage of binary contents in a phase-change memory (10), which stores the binary contents electrically and/or optically in a non-volatile manner by locally switching a material (18) between an amorphous and a crystalline phase, whereby the state with respect to the electrical conductivity of the material (18) and/or the reflection properties of the material (18) determines the information content of the phase-change memory (10).Type: GrantFiled: April 21, 2020Date of Patent: November 14, 2023Assignee: Rheinisch-Westfälische Technische Hochschule (RWTH) AachenInventors: Shuai Wei, Matthias Wuttig, Yudong Cheng, Julian Pries, Xiaoling Lu
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Patent number: 11816858Abstract: Embodiments relate to an image processing circuit comprising a noise reduction circuit configurable to perform bilateral filtering on demosaiced and resampled image data, or on raw image data, based on the operating mode of the image processing circuit. The noise reduction circuit filters received image data based upon directional taps, by selecting, for each pixel, a set of neighbor pixels, and comparing values of the set of neighbor pixels to determine whether the pixel lies on a directional edge. For raw images, the noise reduction circuit selects the set of neighbor pixels to include a plurality of pixels of the same color channel as the pixel, and one or more additional pixels of a different color channel, where color values for the one or more additional pixels are determined by interpolating color values of two or more adjacent pixels of the same color channel as the pixel.Type: GrantFiled: February 10, 2021Date of Patent: November 14, 2023Assignee: APPLE INC.Inventors: Maxim Smirnov, Sheng Lin
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Patent number: 11816768Abstract: A method including receiving, from a C-arm device, a plurality of fluoroscopic images of a lung, wherein each fluoroscopic image is obtained with the C-arm device positioned at a particular pose of a plurality of poses traversed by the C-arm device while the C-arm device is moved through a range of motion including a range of rotation, the range of rotation encompassing a sweep angle between 45 degrees and 120 degrees; generating an enhanced tomographic image of the lung, by utilizing: a trained machine learning model and the plurality of fluoroscopic images; and outputting a representation of the enhanced tomographic image, wherein, when tested by a method in which: the lung includes a lesion smaller than 30 millimeters, and the representation is an axial slice showing a boundary of the lesion, the lesion has a contrast-to-noise value of at least 5 as compared to a background of the representation.Type: GrantFiled: December 6, 2022Date of Patent: November 14, 2023Assignee: BODY VISION MEDICAL LTD.Inventors: Dorian Averbuch, Dima Sezganov