Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) in a selected manner through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth and the particles for a pattern at the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.
Abstract: A method, and system for reducing switching noise on a device, and an improved capacitor-integrated device is disclosed. At least one conductive line is deposited within a device. Additionally, at least one capacitor is attached to the at least one conductive line. Once the capacitor is attached to the conductive line, an improved capacitor-integrated circuit device results. The method and system of the present invention provides for the addition of at least one capacitor to be added between the power supply pins on at least one IC device. By doing so, switching signal noise is reduced. As a result of the method and system of the present invention, the resulting improved device can be efficiently used to check various qualities such as the level of ground bouncing noise, or switching signal noise reduction, without changing the circuit design of the device.
Abstract: The present invention provides a method for producing atomic ridges on a substrate comprising: depositing a first metal on a substrate; heating the substrate to form initial nanowires of the first metal on the substrate; depositing a second metal on the initial nanowires of the first metal to form thickened nanowires that are more resistant to etching than the initial nanowires; and etching the substrate to form atomic ridges separated by grooves having a pitch of 0.94 to 5.35 nm. The present invention also provides a method for forming Au and other metal nanowires that may be used for electrical conductors and both positive and negative etch masks to form a plurality of ridges at a pitch of 0.94 to 5.35 nm containing at least two adjacent grooves with widths of 0.63 to 5.04 nm.
Type:
Grant
Filed:
September 8, 2000
Date of Patent:
July 2, 2002
Assignees:
StarMega Corporation, Virginia Commonwealth University
Abstract: A method for forming an electrical contact for a semiconductor device comprises the steps of providing a semiconductor wafer section having a major surface with a plurality of conductive pads thereon and electrically coupling each pad with an elongated electrical interconnect. Next, each electrical interconnect is encased in a dielectric and the dielectric is sectioned to expose a portion of each interconnect. An inventive structure which can be formed by the inventive method is also described.
Type:
Grant
Filed:
May 11, 1998
Date of Patent:
December 11, 2001
Assignee:
Micron Technology, Inc.
Inventors:
Walter L. Moden, Larry D. Kinsman, Warren M. Farnworth
Abstract: A structure and method for making a cavity fuse over a gate conductor stack.
Type:
Grant
Filed:
March 31, 1999
Date of Patent:
August 14, 2001
Assignee:
International Business Machines Corporation
Inventors:
Kenneth C. Arndt, Axel C. Brintzinger, Richard A. Conti, Donna R. Cote, Chandrasekhar Narayan, Ravikumar Ramachandran, Thomas S. Rupp, Senthil K. Srinivasan