Abstract: An integrated circuit structure is described which includes a base semiconductor structure and a programmable semiconductor structure which are fabricated separately and later joined to form the integrated circuit structure. The base semiconductor structure includes conventional semiconductor devices fabricated in accordance with a first set of design rules. The programmable semiconductor structure includes programmable elements fabricated in accordance with a second set of design rules which may be different than the first set of design rules. The programmable elements are used to control the configuration of the integrated circuit structure or to provide field programmable devices for use in the integrated circuit structure.

Abstract: The silicon real estate consumed by a conventional Schottky diode is reduced in the present invention by forming the Schottky diode through a field oxide isolation region. Etching through the field oxide isolation region requires extra etch time which is provided by conventional etch steps that typically specify a 50-100% overetch during contact formation.

Abstract: A half-transmittance photodiode usable as a photodetector in receivers for “ping-pong transmission” is improved in temperature characteristic, so that a half-transmittance photodiode usable at low temperatures is available. A p-n junction is formed in a buffer layer, not in an absorption layer.

Abstract: A semiconductor device includes two or more semiconductor elements provided on a semi-insulating substrate with a buffer layer and an interlevel film being interposed therebetween, an element isolating portion provided as a result of forming a groove between the two or more semiconductor elements through the buffer layer and the interlevel film so as to reach the semi-insulating substrate, and a protective film for protecting at least ends of the buffer layer in the vicinity of the element isolating portion.

Abstract: A microsensor for identifying a change in a characteristic of an environment having temperatures of up to approximately five hundred degrees Centigrade includes a substantially flat insulator layer made of silicon oxide. A base layer made of silicon is integrally attached to one side of the insulator layer and a support layer is integrally attached to the other side of the insulator layer. Together the base layer and the support layer stabilize the support layer which is only about one thousand angstroms thick. A sensor element is mounted on the exposed surface of the support layer, and opposite the insulator layer, to generate a signal in response to the change in the environmental characteristic. Additionally, there is an electronic element which is processed into the support layer. This electronic element is electrically connected directly with the sensor element to process the signal and indicate an appropriate response.

Abstract: The present invention is to provide an image sensor, including: a semiconductor substrate of a first conductive type: a peripheral circuit formed on a first region of the semiconductor substrate, wherein a ground voltage level is applied to the first region; a unit pixel array having a plurality of unit pixels formed on a second region of the semiconductor substrate, wherein the first region is isolated from the second region and wherein a negative voltage level is applied to the second region; and a negative voltage generator for providing the negative voltage for the second region.

Abstract: An integrated circuit provided with ESD protection means comprising a silicon-controlled rectifier whose n-well (WLL), if the substrate (SBSTR) of the integrated circuit is of the p-type, is connected to the VDD supply instead of to the bonding-pad (BP) to which electronic circuitry is connected. Consequently, the anode is only formed by the p+ diffusion (d4) in the n-well (WLL). Therefore, negative voltages are allowed at the bonding pad (BP) because the junction is not forward-biased. Thus, an ESD protection towards the VSS is obtained. Additionally, a PMOST (MP) is used as an ESD protection towards the VDD.

Abstract: A homojunction bipolar transistor with performance characteristics similar to more costly heterojunction or retrograde base transistors. The high emitter resistivity found in prior homojunction devices is circumvented using a low work function material layer in forming the emitter. This produces an economically viable high performance alternative to SiGe HBTs or SiGe retrograde base transistors.

Abstract: An AlxGa1−xAs/GaAs/AlxGa1−xAs quantum well exhibiting a bound-to-quasibound intersubband absorptive transition is described. The bound-to-quasibound transition exists when the first excited state has the same energy as the “top” (i.e., the upper-most energy barrier) of the quantum well. The energy barrier for thermionic emission is thus equal to the energy required for intersubband absorption. Increasing the energy barrier in this way reduces dark current. The amount of photocurrent generated by the quantum well is maintained at a high level.

Abstract: A microprobe chip for detecting evanescent waves includes a photoconductive material and a substrate for supporting the photoconductive material. The photoconductive material is connected to electrodes formed on the substrate. A method for making a microprobe chip for detecting evanescent waves includes forming a film comprising a photoconductive material on a peeling layer of a first substrate, the film having a shape of the microprobe chip, and transferring the film on the peeling layer onto a junction layer provided on a second substrate. A method for making a probe provided with a microprobe chip for detecting evanescent waves includes forming a film comprising a photoconductive material and having the shape of the microprobe chip on a peeling layer of a first substrate, forming a thin film cantilever on a second substrate, and transferring the film on the peeling layer onto a junction layer formed on the thin film cantilever.

Abstract: A semiconductor strain sensor comprises a semiconductor cantilever probe having a free end and a surface portion for undergoing deformation due to a displacement of the free end. A Schottky junction is disposed on the surface portion of the semiconductor cantilever probe and is positioned to undergo a change in electrical characteristic in response to the deformation of the surface portion. The amount of displacement of the free end of the cantilever probe is detected on the basis of a change in the electrical characteristic of the Schottky junction.

Abstract: A first surface layer made of compound semiconductor material is defined in a surface area of a substrate. A first intermediate layer is formed on the surface layer, the first intermediate layer being made of compound material having Ga as a III group element and S as a VI element and having a thickness of at least two monolayers or thicker. A first electrode is formed on the first intermediate layer, being electrically connected to the first surface layer with an ohmic contact.

Abstract: The light brightness of a semiconductor LED is increased by employing a light transmitting window comprising ZnO. In another embodiment, current crowding is reduced, efficiency increased and reliability (lifetime) increased by forming a thin semiconductor transition layer to reduce contact resistance between an overlying transparent window layer and an underlying transparent current diffusion layer formed on a double heterostructure light generation region. Optimum performance is achieved employing the transition layer with a ZnO transparent window layer.

Abstract: The present invention is directed to a CMOS sensor. A substrate has a metal-oxide semiconductor. The metal-oxide semiconductor has a gate and a source/drain region in the substrate. A dummy shield layer is over a part of the substrate. A sensor region is in the substrate with one end extended from a part of the source/drain region and the other end adjacent to the part of the substrate under the dummy shield layer.

Abstract: An angle cavity resonant photodetector assembly (8), which uses multiple reflections of light within a photodetector (14) to convert input light into an electrical signal. The photodetector (14) has a combination of generally planar semiconductor layers including semiconductor active layers (20) where light is converted into an electrical output. The photodetector (14) is positioned relative to a waveguide (10), where the waveguide (10) has a waveguide active layer (22) located between a pair of waveguide cladding layers (24) and (26) and includes a first end (28) for receiving light and a second end (30) for transmitting the light to the photodetector (14). The photodetector (14) has a first reflector (12) and second reflector (16) that provides for multiple reflections across the semiconductor active layers (20).

Abstract: Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods are described. In one embodiment, a monolithic inductance-enhancing integrated circuit comprises a transistor supported by a bulk monocrystalline silicon substrate. An inductor assembly is supported by the substrate and operably connected with the transistor in an inductance-enhancing circuit configuration having a quality factor (Q) greater than 10. In another embodiment, a complementary metal oxide semiconductor (CMOS), inductance-enhancing integrated circuit includes a field effect transistor supported over a silicon-containing substrate and having a gate, a source, and a drain. A first inductor is received within an insulative material layer over the substrate, and is connected to the gate. A second inductor is received within the insulative material layer and is connected to the source.

Abstract: A complementary Field Effect Transistor includes a first transistor and a second transistor stacked on the first transistor. The angle between the source/drain pair for the first transistor and the source/drain pair for the second transistor is nonzero and other than 180 degrees (e.g., 90 degrees). In one embodiment, each transistor has its own gate, and the active regions for the transistors are separated and situated between the gates. In another embodiment, the active regions for the transistors share a single channel region. In still another embodiment, the transistors share a single gate. In yet another embodiment, the transistors share both a channel region and a gate.

Abstract: An energy dispersive x-ray and gamma-ray photon counter is described. The counter uses a photon sensor which incorporates a unique photocathode called Advanced Semiconductor Emitter Technology for X-rays (ASET-X) as its critical element for converting the detected photons to electrons which are emitted into a vacuum. The electrons are multiplied by accelerations and collisions creating a signal larger than the sensor noise and thus allowing the photon to be energy resolved very accurately, to within ionization statistics. Because the signal is already above the sensor noise it does not have to be noise filtered therefore allowing high-speed counting. The photon sensor can also be used as a device to visualize and image gamma-ray and x-ray sources.

Abstract: A distributed photodiode structure is shown having a plurality of diffusions formed in a uniform pattern on a first surface of a semiconductor substrate and interconnected by a plurality of connective traces. The diffusions are minimum geometry dots for a standard semiconductor fabrication process that are spaced apart from one another by an interval that is less than an average distance travelled by photo-generated carriers in the substrate before recombination. A conductive backplane is formed on a second surface of the semiconductor substrate to produce an inverted induced signal for noise cancelling.

Abstract: A high voltage semiconductor device is provided with a p layer which forms a main pn-junction, a plurality of p layers which surround the p layer in a ring form, a ring-like n+ layer which further surrounds those p layers, forward field plates extending in the peripheral direction and reverse field plates extending in the inside direction, the field plates being in contact at a low resistance with the p and n+ layers and reaching the surface of an n− layer through an insulating film, the area of the field plates being not less than one half of the n− surface. This arrangement is particularly effective in stabilizing the blocking voltage of a high voltage semiconductor device which is used in a severe environment, and is very effective in improving the reliability of a high voltage control unit.