Abstract: An electronic device according to various embodiments may include: a first frame at least partially exposed to an outside of the electronic device and comprising a metal material, a flexible printed circuit board at least a portion of which is disposed adjacent to the first frame, a first connector electrically connecting the flexible printed circuit board and a main board of the electronic device, a bendable second connector electrically connecting the flexible printed circuit board and the first frame, a bolt including a bolt body extending through a groove formed in the second connector to be bolt-coupled to a bolt groove formed in the first frame and a bolt head formed integrally with the bolt body and disposed in a first direction with respect to the first frame, a plate disposed adjacent to the bolt head of the bolt and coupled to the first frame in the first direction to allow the bolt body of the bolt to be maintained in a state of being coupled to the bolt groove formed in the first frame, and an int

Abstract: Disclosed is a method of manufacturing a stretchable substrate having improved stretch uniformity according to various embodiments of the present disclosure in order to implement the above-described object. The method may include forming an auxetic including a plurality of unit structures, and attaching one or more elastic sheets to the auxetic and forming a stretchable substrate.

Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

Abstract: A board, including a first pad area, a second pad area, a first micro heater, a second micro heater, a first heater terminal pad, a second heater terminal pad, and a third heater terminal pad, is provided. The first pad area and the second pad area respectively include at least one pad. The first micro heater and the second micro heater are respectively disposed corresponding to the first pad area and the second pad area. The first heater terminal pad and the second heater terminal pad form a loop with the first micro heater by being electrically connected to an outside, so that the first micro heater generates heat. The second heater terminal pad and the third heater terminal pad form another loop with the second micro heater by being electrically connected to the outside, so that the second micro heater generates heat. A circuit board and a fixture are also provided.

Abstract: A method for attaching two electronics boards, e.g., a testing PCB and a space transformer, comprises rack welding resin prepreg and a mylar film to a testing PCB; laser drilling via holes in the resin prepreg and mylar film such that the holes are aligned on one side of the resin prepreg with connection/capture pads on the testing PCB and aligned (after attachment) on the other side of the resin prepreg with connection capture pads on a space transformer, filling the via holes with sintering paste; applying a pressure treatment to remove air, bubbles, and voids from the sintering paste; removing the mylar film; and using a lamination press cycle to attach a space transformer to the resin prepreg.

Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation b

Abstract: A circuit board with anti-corrosion properties, a method for manufacturing the circuit board, and an electronic device are provided. The circuit board includes a circuit substrate, a first protective layer, and a second protective layer. The circuit substrate includes a base layer and an outer wiring layer formed on the base layer. The circuit substrate further defines a via hole connected to the outer wiring layer. The first protective layer is formed on the outer wiring layer and an inner sidewall of the via hole, and is made of a white oil. The second protective layer is formed on the first protective layer.

Abstract: The present invention provides a circuit driving element including a driving chip having a long axis and a short axis, the long axis being vertical to a bending axis and a crack prevention layer having a wider area than an area of the driving chip and covering a whole top surface of the driving chip, wherein the circuit driving element is provided in a non-display area of a display panel and is bent with respect to the bending axis, and a display apparatus including the circuit driving element.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: The present invention relates to a laminate including two or more layers of a composite layer including a fiber substrate and a cured product of a thermosetting resin composition, the two or more layers of the composite layer including one or more layer of a composite layer (X) and one or more layer of a composite layer (Y), the composite layer (X) being a layer including a first fiber substrate constituted by first glass fibers, the composite layer (Y) being a layer including a second fiber substrate constituted by second glass fibers, and the second glass fibers having a higher tensile elastic modulus at 25° C. than the first glass fibers, a printed wiring board including the laminate, a semiconductor package, and a method for producing a laminate.

Abstract: An electronic device includes a display module including a display unit and a hinge unit coupled to the display unit and configured to be rolled with the display unit, the display unit including a display panel, a flexible circuit board connected to the display panel, and a main circuit board connected to the flexible circuit board, a housing including sidewall portions each extending in a first direction, in which at least one of the sidewall portions includes an accommodation groove to which the main circuit board is inserted, and the sidewall portions are deformable between a closed state of surrounding the display module and an opened state of exposing at least a portion of the display module outside of the housing.

Abstract: A power conversion device includes a multilayer board including conductive layers that form a primary-side coil and a secondary-side coil of a transformer; and a circuit board electrically connected to the multilayer board, having a first conversion circuit formed therein or thereon. The multilayer board includes a transformer region in which the transformer is formed; a core member disposed in the transformer region and around the primary-side coil and secondary-side coil are wound; a circuit formed region which is adjacent to the transformer region and a second conversion circuit is formed, the second conversion circuit being electrically connected to the primary-side coil or the secondary-side coil; and a terminal portion which is electrically connected to the secondary-side coil or the primary-side coil. The first conversion circuit is electrically connected to the transformer via the terminal portion. One of the coils has a smaller number of turns than the other coil.

Abstract: The application provides a flexible display panel and an electronic device. The flexible display panel includes a plurality of pixel groups. The pixel groups include a plurality of pixels arranged in a first direction. The flexible display panel also includes: a substrate; a semiconductor layer; a gate electrode; a metal part; and a first insulating layer arranged on the metal part. The first insulating layer is provided with at least one first groove, and a position of the first groove corresponds to a position of a gap between two adjacent pixel groups.

Abstract: A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

Abstract: A laminate for use in a circuit board is provided. The laminate comprises a conductive layer and a film positioned adjacent to the conductive layer. The film comprises a polymer composition that includes a liquid crystalline polymer and a hydrophobic material. The polymer composition exhibits a dielectric constant of about 5 or less and dissipation factor of about 0.05 or less at a frequency of 10 GHz.

Abstract: A biocompatible electrical connection includes a substrate; a ferrule having a concentric flange at a first end of the ferrule; a first adhesive; and a second adhesive. The first adhesive adheres a first surface of the concentric flange of the ferrule to a surface of the substrate. The second adhesive fills an annular space between a hole in the substrate and the ferrule. The first adhesive or the second adhesive forms a conductive path on the surface of the substrate between the ferrule and a circuit pattern on the substrate.

Abstract: Embodiments and fabrication methods for a printed circuit board comprising two or more electrically conductive layers, including at least a first conductive layer opposing and adjacent to a second conductive layer. Also including one or more electrically non-conductive layers including at least a first non-conductive layer disposed between the first conductive layer and the second conductive layer. A first copper pad is included on the first conductive layer. A second copper pad is included on the second conductive layer. There is a conductive via extending through the first non-conductive layer and electrically connecting the first copper pad to the second copper pad and solder mask material on the first copper pad around the via.

Abstract: Forming aluminum circuit layers forming an aluminum circuit layers on one surface of a ceramic substrate and forming copper circuit layers are included. The copper circuit layers are formed by laminating copper boards for the circuit layers on the respective aluminum circuit layers, arranging the laminate between a pair of support boards having a convex curved surface at least on one surface so as to face to each other, moving the support boards in a facing direction to press the laminate in a lamination direction, and heating in this pressing state so that the copper boards for the circuit layers are bonded on the aluminum circuit layers respectively by solid phase diffusion. In the step of forming the copper circuit layers, the support boards are arranged so that either one of the convex curved surface is in contact with the adjacent copper boards for the circuit layers in the laminate.

Abstract: Vias may be established in printed circuit boards or similar structures and filled with a monolithic metal body to promote heat transfer. Metal nanoparticle paste compositions, such as copper nanoparticle paste compositions, may provide a ready avenue for filling the vias and consolidating the metal nanoparticles under mild conditions to form each monolithic metal body. The monolithic metal body within each via can be placed in thermal contact with one or more heat sinks to promote heat transfer. Adherence of the monolithic metal bodies within the vias may be promoted by a coating upon the walls of the vias. A tin coating, for example, may be particularly suitable for promoting adherence of a monolithic metal body comprising copper.

Abstract: The laminate of the present disclosure includes multiple glass ceramic layers each containing quartz and a glass that contains SiO2, B2O3, Al2O3, and M2O, where M is an alkali metal. The B concentration of a surface layer portion of the laminate is lower than the B concentration of an inner layer portion of the laminate.