Patents Examined by Yuanda Zhang
  • Patent number: 11862936
    Abstract: The present disclosure provides an optical member for use in a laser module that includes a surface emitting laser, the optical member being capable of detecting damage (cracking, peeling, and the like), a method for manufacturing the optical member, a laser module including the optical member, and a laser device.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: January 2, 2024
    Assignee: DAICEL CORPORATION
    Inventors: Takahiro Iwahama, Takeshi Fujikawa, Sadayuki Fukui
  • Patent number: 11855413
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) array may include an n-type substrate layer and an n-type metal on a bottom surface of the n-type substrate layer. The n-type metal may form a common anode for a group of VCSEL. The VCSEL array may include a bottom mirror structure on a top surface of the n-type substrate layer. The bottom mirror structure may include one or more bottom mirror sections and a tunnel junction to reverse a carrier type within the bottom mirror structure. The VCSEL array may include an active region on the bottom mirror structure and an oxidation layer to provide optical and electrical confinement. The VCSEL array may include an n-type top mirror on the active region, a top contact layer over the n-type top mirror, and a top metal on the top contact layer. The top metal may form an isolated cathode for the VCSEL array.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: December 26, 2023
    Assignee: Lumentum Operations LLC
    Inventors: Guowei Zhao, Matthew Glenn Peters, Jun Yang, Eric R. Hegblom
  • Patent number: 11843223
    Abstract: According to one embodiment, the first process of forming a first light-reflecting structure including forming a patterned dielectric layer on a substrate, forming a first high refractive index layer on the substrate and the dielectric layer, planarizing the first high refractive index layer, forming a mask layer on the first high refractive index layer, forming a periodic structure in the mask layer and the first high refractive index layer, the periodic structure having openings separated at a constant period, forming a low refractive index layer on the mask layer and filling the periodic structure with the low refractive index layer, and performing chemical mechanical polishing to cause the mask layer and the low refractive index layer to form substantially the same plane.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: December 12, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Ohira, Hideto Furuyama
  • Patent number: 11831127
    Abstract: A laser diode driver includes a clock terminal to receive a clock signal, configuration terminals to receive configuration data, drive terminals, and charging terminals. A first charging terminal is operable to charge a source capacitor of a resonant circuit that includes the source capacitor, an inductor, and a bypass capacitor. Each drive terminal is operable to be directly electrically connected to an anode or cathode of a laser diode or to ground. A mode, output selection, and grouping of drive signals that are delivered to the laser diodes are configured based on the configuration data. The laser diode driver is operable to control a current flow through the resonant circuit to produce high-current pulses through the laser diodes, the high-current pulses corresponding to a peak current of a resonant waveform developed at respective anodes of the laser diodes, a timing of the high-current pulses being synchronized using the clock signal.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: November 28, 2023
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 11824327
    Abstract: A photonic integrated circuit (PIC) assembly comprising a semiconductor optical amplifier (SOA) array and a U-turn chip. The SOA array includes an input SOA and a plurality of SOAs. The input SOA and the plurality of SOAs are arranged parallel to one another. The U-turn chip includes an optical splitter and a waveguide assembly. The optical splitter is configured to receive amplified input light propagating in a first direction from the input SOA, and divide the amplified light into beams. The waveguide assembly guides the beams to a corresponding SOA of the plurality of SOAs, and adjusts a direction of prorogation of each of the guided beams to be substantially parallel to a second direction that is substantially opposite the first direction.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 21, 2023
    Assignee: OURS TECHNOLOGY, LLC
    Inventors: Andrew Steil Michaels, Lei Wang, Sen Lin
  • Patent number: 11817674
    Abstract: A semiconductor optical device may include a semiconductor substrate; a compound semiconductor layer on the semiconductor substrate; an additional insulating film on the pedestal portion of the compound semiconductor layer, the additional insulating film having an upper surface and a side surface at an inner obtuse angle between them; a passivation film covering the compound semiconductor layer and the additional insulating film except at least part of the mesa portion, the passivation film having a protrusion raised by overlapping with the additional insulating film; a mesa electrode on the at least part of the mesa portion; a pad electrode on the passivation film within the protrusion; and an extraction electrode on the passivation film, the extraction electrode being continuous within and outside the protrusion, the extraction electrode connecting the pad electrode and the mesa electrode, the extraction electrode being narrower in width than the pad electrode.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 14, 2023
    Assignee: Lumentum Japan, Inc.
    Inventors: Ryosuke Nakajima, Yasushi Sakuma, Shigetaka Hamada
  • Patent number: 11811197
    Abstract: A VCSEL can include: a substrate that passes light therethrough; a phase matching layer over a top mirror stack; a first metal layer over the phase matching layer; and an end metal region over the first metal layer. The phase matching layer and first metal layer have a cooperative thickness to provide reflectivity of at least a predetermined reflectivity threshold for the emission wavelength. A method of making a VCSEL can include: providing a substrate; forming a first mirror stack above the substrate; forming an active region above the first mirror stack; and forming a reflective end above the active region, the reflective end having a phase matching layer and a first metal layer. The phase matching layer and first metal layer have a combined thickness for the reflective end to have a reflectivity of at least a predetermined reflectivity threshold for an emission wavelength of the VCSEL.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: November 7, 2023
    Assignee: II-VI DELAWARE, INC.
    Inventors: James K. Guenter, Hao Chen
  • Patent number: 11811193
    Abstract: A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Robert J. Deri, John W. Elmer
  • Patent number: 11811195
    Abstract: A tunable solid state laser device are described comprising a semiconductor based gain chip and a silicon photonic filter chip with tuning capability. The silicon photonic filter chip can comprises an input-output silicon waveguide, at least two ring resonators formed with silicon waveguides, one or more connecting silicon waveguides interfacing with the ring resonators, a separate heater associated with each ring resonator, a temperature sensor configured to measure the chip temperature, and a controller connected to the temperature sensor and the separate heaters and programmed with a feedback loop to maintain the filter temperature to provide the tuned frequency. The one or more connecting silicon waveguides are configured to redirect light resonant with each of the at least two ring resonators back through the input-output silicon waveguide. Corresponding methods are described for the control of the laser frequency. Improved structures of the SiPho multiple filter chip involve a Zagnac interferometer.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: November 7, 2023
    Assignee: NeoPhotonics Corporation
    Inventors: Yongkang Gao, Jiann-Chang Lo
  • Patent number: 11811191
    Abstract: Disclosed is an optical semiconductor device including a semiconductor laser chip, an insulation substrate, a ground pattern, a mounted pattern, a resistor and an extension ground pattern. The insulation substrate has a surface mounting the semiconductor laser chip thereon. The ground pattern and the mounted pattern are provided on the surface. The mounted pattern has an opposite side opposite to the ground pattern. The resistor is disposed such that a side edge of the resistor separates from an extension region of the opposite side. The extension ground pattern is positioned in the extension region of the opposite side and is electrically connected to the ground pattern. The capacitor is disposed on the mounted pattern.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: November 7, 2023
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Masahiro Hirayama
  • Patent number: 11791609
    Abstract: The grating layer of a surface emitting laser is divided into a first grating region and a second grating region along a horizontal direction. The second grating region is located at a middle area of the grating layer, while the first grating region is located in an outer peripheral area of the grating layer. Each of the first and second grating regions comprises a plurality of micro-grating structures. The grating period of the micro-grating structures in the first grating region is in accordance with the following mathematical formula: ? = m ? ? 2 * n eff ; in addition, the grating period of the micro-grating structures in the second grating region is in accordance with the following mathematical formula: ? = o ? ? 2 * n eff . Wherein, ? is the length of grating period, ? is the wavelength of the laser light, neff is the equivalent refractive index of semiconductor waveguide, m=1, and o=2.
    Type: Grant
    Filed: September 26, 2020
    Date of Patent: October 17, 2023
    Inventors: Chien Hung Pan, Cheng Zu Wu
  • Patent number: 11784461
    Abstract: A light emitting device includes first to third semiconductor laser elements. Each of the semiconductor laser elements includes at least two emitters, and configured to emit red-color light, green-color light, or blue-color light. The mount member includes first to third conduction parts, each including a plurality of metal films including mounting regions that are aligned in a predetermined direction. The first to third semiconductor laser elements are respectively mounted on the first to third conduction parts of the mount member in a junction-down configuration.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: October 10, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Masatoshi Nakagaki, Soichiro Miura
  • Patent number: 11784458
    Abstract: A surface-emitting laser package comprises: a substrate; a surface-emitting laser device disposed on the substrate, and having a non-emitting area and an emitting area which includes a plurality of emitters each generating a first laser beam; a housing disposed around the surface-emitting laser device; and a diffusing part disposed on the surface-emitting laser device. The emitting area has a first width in a first direction and a second width in a second direction perpendicular to the first direction, and the second width may be greater than the first width. The diffusing part outputs the first laser beam into a second laser beam having a first angle of view in the first direction and a second angle of view in the second direction, and the first angle of view may be greater than the second angle of view.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: October 10, 2023
    Assignee: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.
    Inventors: Ba Ro Lee, Myung Sub Kim, Baek Jun Kim, Ki Bum Sung
  • Patent number: 11769982
    Abstract: Methods and apparatus for controlling laser firing timing and hence bandwidth in a laser capable of operating at any one of multiple repetition rates.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: September 26, 2023
    Assignee: Cymer, LLC
    Inventor: Tanuj Aggarwal
  • Patent number: 11764544
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) including a lower mirror, an upper mirror, an active layer interposed between the lower mirror and the upper mirror, an aperture forming layer interposed between the upper mirror and the active layer, and including an oxidation layer and a window layer surrounded by the oxidation layer, a ring-shaped trench passing through the upper mirror, the aperture forming layer, and the active layer to define an isolation region therein, and a plurality of oxidation holes disposed in the isolation region surrounded by the trench, and passing through the upper mirror and the aperture forming layer.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: September 19, 2023
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Ki Hwang Lee, Byueng Su Yoo, Jeong Rae Ro
  • Patent number: 11764545
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) including a substrate including a plurality of emitters forming an array region, a lower mirror, an upper mirror, an active layer interposed between the lower mirror and the upper mirror, an aperture forming layer interposed between the upper mirror and the active layer and including an oxidation region and a window region, a connector disposed on the upper mirror, a plurality of oxidation holes passing through the upper mirror and the aperture forming layer, an upper insulation layer covering the plurality of oxidation holes, and a pad electrically connected to the connector, in which at least a portion of the connector is disposed in the plurality of oxidation holes, the plurality of emitters is disposed in substantially a honeycomb shape on the substrate, and the pad is formed on one side of the substrate adjacent to the array region.
    Type: Grant
    Filed: July 31, 2022
    Date of Patent: September 19, 2023
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Ki Hwang Lee, Jeong Rae Ro, Byueng Su Yoo, Yoon Sang Jeon, Gong Hee Choi
  • Patent number: 11749963
    Abstract: Embodiments are disclosed for driving a vertical cavity surface emitting laser (VCSEL). An example method includes injecting, via a universal driver, a direct current (DC) bias current to a VCSEL. The VCSEL is configured to convert the modulated signal into an optical signal encoding one or more bits. The example method further includes providing a modulated signal to the VCSEL. The modulated signal encodes a digital sequence comprising the one or more bits using a modulation method.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: September 5, 2023
    Assignee: Nvidia Denmark ApS
    Inventors: Juan Jose Vegas Olmos, Roy Naveh, Elad Mentovich
  • Patent number: 11749961
    Abstract: A light emitting device includes first to third semiconductor laser elements. Each of the semiconductor laser elements includes at least two emitters, and configured to emit red-color light, green-color light, or blue-color light. The mount member includes first to third conduction parts, each including a plurality of metal films including mounting regions that are aligned in a predetermined direction. The first to third semiconductor laser elements are respectively mounted on the first to third conduction parts of the mount member in a junction-down configuration.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: September 5, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Masatoshi Nakagaki, Soichiro Miura
  • Patent number: 11728623
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) is provided that includes a mesa structure disposed on a substrate. The mesa structure defines an emission axis of the VCSEL. The mesa structure includes a first reflector, a second reflector, and a cascaded active region structure disposed between the first reflector and the second reflector. The cascaded active region structure includes a plurality of cascaded active region layers disposed along the emission axis, where each of the cascade active region layers includes an active region having multi-quantum well and/or dots layers (MQLs), a tunnel junction aligned with the emission axis, and an oxide confinement layer. The oxide confinement layer is disposed between the tunnel junction and MQLs, and has an electrical current aperture defined therein. The mesa structure defines an optical window through which the VCSEL is configured to emit light.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: August 15, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Yuri Berk, Vladimir Iakovlev, Tamir Sharkaz, Elad Mentovich
  • Patent number: 11728625
    Abstract: A light emitting element of the present disclosure includes a compound semiconductor substrate 11, a stacked structure 20 including a GaN-based compound semiconductor, a first light reflection layer 41, and a second light reflection layer 42. The stacked structure 20 includes, in a stacked state a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22. The first light reflection layer 41 is disposed on the compound semiconductor substrate 11 and has a concave mirror section 43. The second light reflection layer 42 is disposed on a second surface side of the second compound semiconductor layer 22 and has a flat shape. The compound semiconductor substrate 11 includes a low impurity concentration compound semiconductor substrate or a semi-insulating compound semiconductor substrate.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: August 15, 2023
    Assignee: Sony Corporation
    Inventors: Tatsushi Hamaguchi, Jugo Mitomo, Rintaro Koda