Abstract: A read-after-write system for optical recording systems includes a mirror used to direct read beams to a desired position on a recording medium relative to write beams impinging on the recording medium. The mirror may be adjustable to direct the read beams through a range of possible positions.

Abstract: A reconfigurable processor array (RPA) for performing high speed operations on data arrays and eliminating I/O bottleneck. The array memory has a working side for storing arrays to be processed during a given array operation, and an I/O side for loading an array to be used during a subsequent operation and downloading an array resulting from a preceding operation.

Abstract: A block processing computing system includes a decomposition unit, a control circuit, a system memory, a data block path and a block processor. The decomposition unit receives externally-supplied primitive command packets and decomposes the primitive into machine language operations on computational blocks of data. The control circuitry generates control and address signals for performing the machine level operations. The data block path includes alignment circuitry for selecting data from burst-accessed blocks of data and a macropipeline for controllably storing and transferring blocks of data to and from the block processor. The block processor has interchangeable, double-buffered local zone memories and a parallel set of pipelined vector processors for performing block operations on computational blocks of data.

Abstract: A microcomputer having a microprocessor operative in response to a dual frequency clock, such microprocessor being adapted to read data stored in a programmable memory in response to address and read enable signals supplied to a programmable memory and being adapted to process such data in response to the clock pulses supplied by the dual frequency clock. The dual frequency clock produces clock pulses at a relatively low rate until such time as either a sensing device is activated or a time duration has passed, in which case the mine is to selfdestruct. When the sensor is activated the microprocessor commands the dual frequency clock to produce relatively high frequency clock pulses to enable the microprocessor to rapidly determine whether the mine should or should not be detonated. Relatively low power is consumed by the microcomputer during the period of time the processor is "counting time" and computing whether the predetermined period of time has arrived, i.e.