Abstract: A temperature-controlled substrate support for a substrate processing system includes a substrate support located in the processing chamber. The substrate support includes N zones and N resistive heaters, respectively, where N is an integer greater than one. A temperature sensor is located in one of the N zones. A controller is configured to calculate N resistances of the N resistive heaters during operation and to adjust power to N?1 of the N resistive heaters during operation of the substrate processing system in response to the temperature measured in the one of the N zones by the temperature sensor, the N resistances of the N resistive heaters, and N?1 resistance ratios.

Abstract: A precursor dispensing system includes a source, an ampoule, a first valve, a second valve, a line charge volume container and a controller. The source supplies a liquid precursor. The ampoule receives the liquid precursor from the source. The first valve adjusts flow of the liquid precursor from the source to the ampoule. The second valve adjusts flow of a precursor vapor from the ampoule to a showerhead of a substrate processing chamber. The line charge volume container is connected to a conduit and stores a charge of the precursor vapor, where the conduit extends from the ampoule to the second valve. The controller: opens the first valve and closes the second valve to precharge the line charge volume container; and during a dose operation, open the second valve to dispense a bulk amount of the precursor vapor from the line charge volume container and into the substrate processing chamber.

Abstract: A showerhead comprises first, second, and third components. The first component includes a disc-shaped portion and a cylindrical portion extending perpendicularly from the disc-shaped portion. The disc-shaped portion includes first and second sets of holes having first and second diameters, respectively, that extend from a center of the disc-shaped portion to an inner diameter of the cylindrical portion. The second component is disc-shaped and is attached to the disc-shaped portion of the first component, defines a plenum that is in fluid communication with the second set of holes, and includes a pair of arc-shaped grooves along a periphery and on opposite ends of the top surface and a plurality of grooves extending between the pair of arc-shaped grooves. The third component is disc-shaped, is attached to the second component, and includes a gas inlet connected to the plenum, and fluid inlet and outlet connected to the arc-shaped grooves.

Abstract: A substrate processing system includes a gas source, an RF source, and a light source. The gas source supplies a first gas to a process module of the substrate processing system. The RF source supplies RF power to the process module to generate plasma when the first gas is supplied to the process module of the substrate processing system. The light source is coupled to the process module to introduce light into the process module during the plasma generation.

Abstract: A temperature-controlled substrate support for a substrate processing system includes a substrate support located in the processing chamber. The substrate support includes N zones and N resistive heaters, respectively, where N is an integer greater than one. A temperature sensor is located in one of the N zones. A controller is configured to calculate N resistances of the N resistive heaters during operation and to adjust power to N?1 of the N resistive heaters during operation of the substrate processing system in response to the temperature measured in the one of the N zones by the temperature sensor, the N resistances of the N resistive heaters, and N?1 resistance ratios.

Abstract: A method for controlling temperature of a substrate support includes receiving first and second currents corresponding to first and second heater elements, respectively, of a substrate support, receiving first and second voltages corresponding to the first and second heater elements, respectively, calculating a first resistance of the first heater element based on the first voltage and the first current, calculating a second resistance of the second heater element based on the second voltage and the second current, calculating a first temperature of a first zone of the substrate support based on the first resistance and stored data correlating resistances to temperatures, calculating a second temperature of a second zone of the substrate support based on the second resistance and the stored data, and selectively adjusting the stored data based on a comparison between a sensed temperature and at least one of the calculated first temperature and second temperature.

Abstract: A method for controlling temperature of a substrate support includes receiving first and second currents corresponding to first and second heater elements, respectively, of a substrate support, receiving first and second voltages corresponding to the first and second heater elements, respectively, calculating a first resistance of the first heater element based on the first voltage and the first current, calculating a second resistance of the second heater element based on the second voltage and the second current, calculating a first temperature of a first zone of the substrate support based on the first resistance and stored data correlating resistances to temperatures, calculating a second temperature of a second zone of the substrate support based on the second resistance and the stored data, and selectively adjusting the stored data based on a comparison between a sensed temperature and at least one of the calculated first temperature and second temperature.

Abstract: A controller for a substrate processing system includes a resistance calculation module configured to receive a first current and a second current corresponding to a first heater element and a second heater element, respectively, of a substrate support, receive a first voltage and a second voltage corresponding to the first heater element and the second heater element, respectively, calculate a first resistance of the first heater element based on the first voltage and the first current, and calculate a second resistance of the second heater element based on the second voltage and the second current. A temperature control module is configured to separately control power provided to the first heater element and the second heater element based on the first resistance and the second resistance, respectively, and respective relationships between the first and second resistances and first and second temperatures of the substrate support.

Abstract: A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer test system includes an interposer having a first surface and a second surface facing away from the first surface. The system also includes a wafer translator having a first side facing the second surface of the interposer and a second side facing away from the first side and toward a wafer, the first side carrying a plurality of first terminals at a first scale and the second side carrying a plurality of second terminals at a second scale. The first scale is greater than the second scale.

Abstract: Systems, devices, and methods for managing fragmentation in hardware-assisted compression of data in physical computer memory which may result in reduced internal fragmentation. An example computer-implemented method comprises: providing, by a memory management program to compression hardware, a compression command including an address in physical computer memory of data to be compressed and a list of at least two available buffers for storing compressed data; using, by the compression hardware, the address included in the compression command to retrieve uncompressed data; compressing the uncompressed data; and selecting, by the compression hardware, from the list of at least two available buffers, at least two buffers for storing compressed data based on an amount of space that would remain if the compressed data were stored in the at least two buffers, wherein each of the at least two selected buffers differs in size from at least one other of the selected buffers.

Abstract: A controller for a substrate processing system includes a resistance calculation module configured to receive a first current and a second current corresponding to a first heater element and a second heater element, respectively, of a substrate support, receive a first voltage and a second voltage corresponding to the first heater element and the second heater element, respectively, calculate a first resistance of the first heater element based on the first voltage and the first current, and calculate a second resistance of the second heater element based on the second voltage and the second current. A temperature control module is configured to separately control power provided to the first heater element and the second heater element based on the first resistance and the second resistance, respectively, and respective relationships between the first and second resistances and first and second temperatures of the substrate support.

Abstract: Systems, devices, and methods for managing fragmentation in hardware-assisted compression of data in physical computer memory which may result in reduced internal fragmentation. An example computer-implemented method comprises: providing, by a memory management program to compression hardware, a compression command including an address in physical computer memory of data to be compressed and a list of at least two available buffers for storing compressed data; using, by the compression hardware, the address included in the compression command to retrieve uncompressed data; compressing the uncompressed data; and selecting, by the compression hardware, from the list of at least two available buffers, at least two buffers for storing compressed data based on an amount of space that would remain if the compressed data were stored in the at least two buffers, wherein each of the at least two selected buffers differs in size from at least one other of the selected buffers.

Abstract: A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer test system includes an interposer having a first surface and a second surface facing away from the first surface. The system also includes a wafer translator having a first side facing the second surface of the interposer and a second side facing away from the first side and toward a wafer, the first side carrying a plurality of first terminals at a first scale and the second side carrying a plurality of second terminals at a second scale. The first scale is greater than the second scale.

Abstract: A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.

Abstract: A wafer translator and a wafer, removably attached to each other, provides the electrical connection to electrical contacts on integrated circuits on a wafer in such a manner that the electrical contacts are substantially undamaged in the process of making such electrical connections. Various embodiments of the present invention provide a gasketless sealing means for facilitating the formation by vacuum attachment of the wafer/wafer translator pair. In this way, no gasket is required to be disposed between the wafer and the wafer translator. Air, or gas, is evacuated from between the wafer and wafer translator through one or more evacuation pathways in the gasketless sealing means.

Abstract: A wafer translator and a wafer, removably attached to each other, provides the electrical connection to electrical contacts on integrated circuits on a wafer in such a manner that the electrical contacts are substantially undamaged in the process of making such electrical connections. Various embodiments of the present invention provide a gasketless sealing means for facilitating the formation by vacuum attachment of the wafer/wafer translator pair. In this way, no gasket is required to be disposed between the wafer and the wafer translator. Air, or gas, is evacuated from between the wafer and wafer translator through one or more evacuation pathways in the gasketless sealing means.

Abstract: A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.

Abstract: A wafer testing system and associated methods of use an manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.

Abstract: A wafer translator and a wafer, removably attached to each other, provides the electrical connection to electrical contacts on integrated circuits on a wafer in such a manner that the electrical contacts are substantially undamaged in the process of making such electrical connections. Various embodiments of the present invention provide a gasketless sealing means for facilitating the formation by vacuum attachment of the wafer/wafer translator pair. In this way, no gasket is required to be disposed between the wafer and the wafer translator. Air, or gas, is evacuated from between the wafer and wafer translator through one or more evacuation pathways in the gasketless sealing means.