Patents by Inventor Abhilasha Kawle
Abhilasha Kawle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10763881Abstract: A voltage reference noise filter is provided that substantially eliminates noise with minimal external components for any circuit where the reference load current is a constant load and the circuit uses external components that have values that may vary with temperature, over time, and the like. The drift on an output of a voltage reference due to variation of resistor of the external filter is mitigated by moving the external resistor onto the chip containing the circuit. The voltage drop across the resistor is digitally compensated by a scaling factor determined during calibration. When more than one converter is provided on the chip, a further adjustment to the outputs of the converters is made based on the number of converters powered on or off. Also, error in output of converters due to mismatch among the converters is digitally compensated by a further scaling factor.Type: GrantFiled: August 27, 2019Date of Patent: September 1, 2020Assignee: Analog Devices International Unlimited CompanyInventors: Venkata Aruna Srikanth Nittala, Abhilasha Kawle, Rajasekar Rajendran
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Publication number: 20180302101Abstract: A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.Type: ApplicationFiled: April 12, 2017Publication date: October 18, 2018Inventors: Avinash Gutta, Venkata Aruna Srikanth Nittala, Abhilasha Kawle
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Patent number: 10103744Abstract: A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.Type: GrantFiled: April 12, 2017Date of Patent: October 16, 2018Assignee: Analog Devices GlobalInventors: Avinash Gutta, Venkata Aruna Srikanth Nittala, Abhilasha Kawle
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Patent number: 9294037Abstract: Apparatus and methods for autozero amplifiers are provided herein. In certain configurations, an autozero amplifier includes at least three transconductance stages and an autozero timing control circuit configured to control an autozero sequence of the transconductance stages. The autozero timing control circuit can stagger autozeroing of the transconductance stages, such that a relatively small amount of the amplifier's amplification circuitry is connected to or disconnected from the amplifier's signal path at any given time. For example, in certain configurations, when one of the transconductance stages in autozeroed over a particular time interval, the remaining transconductance stages can operate in parallel to provide amplification during that time interval.Type: GrantFiled: March 24, 2014Date of Patent: March 22, 2016Assignee: Analog Devices GlobalInventors: Roberto S. Maurino, Venkata Aruna Srikanth Nittala, Abhilasha Kawle, Sanjay Rajasekhar
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Publication number: 20150270805Abstract: Apparatus and methods for autozero amplifiers are provided herein. In certain configurations, an autozero amplifier includes at least three transconductance stages and an autozero timing control circuit configured to control an autozero sequence of the transconductance stages. The autozero timing control circuit can stagger autozeroing of the transconductance stages, such that a relatively small amount of the amplifier's amplification circuitry is connected to or disconnected from the amplifier's signal path at any given time. For example, in certain configurations, when one of the transconductance stages in autozeroed over a particular time interval, the remaining transconductance stages can operate in parallel to provide amplification during that time interval.Type: ApplicationFiled: March 24, 2014Publication date: September 24, 2015Applicant: Analog Devices TechnologyInventors: Roberto S. Maurino, Venkata Aruna Srikanth Nittala, Abhilasha Kawle, Sanjay Rajasekhar
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Patent number: 9065477Abstract: A digital-to-analog (DAC) element may include a plurality of switches arranged to form two circuit branches between a current source and a first and a second outputs. The first circuit branch may include two switches defining parallel current paths between the current source and the first output terminal. The second circuit branch may include two switches defining parallel current paths between the current source and the second output terminal. A control circuit, responsive to an input signal that selects one of the circuit branches, may provide control signals to close one of switches in the selected circuit branch in a first portion of a clock cycle and to close the other of the switches in the selected circuit branch in a second portion of the clock cycle.Type: GrantFiled: February 12, 2014Date of Patent: June 23, 2015Assignee: ANALOG DEVICES GLOBALInventors: Sanjay Rajasekhar, Abhilasha Kawle, Roberto S Maurino, Srikanth Nittala
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Publication number: 20150061908Abstract: A digital-to-analog (DAC) element may include a plurality of switches arranged to form two circuit branches between a current source and a first and a second outputs. The first circuit branch may include two switches defining parallel current paths between the current source and the first output terminal. The second circuit branch may include two switches defining parallel current paths between the current source and the second output terminal. A control circuit, responsive to an input signal that selects one of the circuit branches, may provide control signals to close one of switches in the selected circuit branch in a first portion of a clock cycle and to close the other of the switches in the selected circuit branch in a second portion of the clock cycle.Type: ApplicationFiled: February 12, 2014Publication date: March 5, 2015Applicant: ANALOG DEVICES TECHNOLOGYInventors: Sanjay RAJASEKHAR, Abhilasha KAWLE, Roberto S. MAURINO, Srikanth NITTALA
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Publication number: 20140354351Abstract: A circuit for reducing flicker noise includes a first current source coupled to an input current. The circuit includes current minors to generate output currents in response to the input current. The output currents include the flicker noise. In addition, the circuit includes a chopping circuit to reduce the flicker noise from each of the output currents.Type: ApplicationFiled: May 23, 2014Publication date: December 4, 2014Applicant: CIREL SYSTEMS PRIVATE LIMITEDInventors: Abhilasha KAWLE, Rachit RAWAT, Shyam SUBRAMANIAN, Prakash EASWARAN, Sundararajan KRISHNAN
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Publication number: 20140203957Abstract: A continuous time input stage including a first digital-to-analog converter (DAC) including a first DAC code input, a second DAC including a second DAC code input, a first set of switches coupled to the output of the first DAC, a second set of switches coupled to the output of the second DAC, and an amplifier configured to receive the output of either the first DAC or the second DAC.Type: ApplicationFiled: January 22, 2013Publication date: July 24, 2014Applicant: Analog Devices TechnologyInventors: Roberto S. MAURINO, Sanjay RAJASEKHAR, Abhilasha KAWLE
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Patent number: 8779958Abstract: A continuous time input stage including a first digital-to-analog converter (DAC) including a first DAC code input, a second DAC including a second DAC code input, a first set of switches coupled to the output of the first DAC, a second set of switches coupled to the output of the second DAC, and an amplifier configured to receive the output of either the first DAC or the second DAC.Type: GrantFiled: January 22, 2013Date of Patent: July 15, 2014Assignee: Analog Devices TechnologyInventors: Roberto S. Maurino, Sanjay Rajasekhar, Abhilasha Kawle