Abstract: In an embodiment of the present invention, a memory card includes a bottom plastic piece having a plurality of lateral sides, one of which includes a notch, and a cavity interposed along the lateral sides. A printed circuit board (PCB) assembly, including memory, is positioned in the cavity. A fin-structure is created as part of the manufacturing process of the bottom plastic piece of the card. The memory card is configured to function in a read-write mode when the fin-structure is present, and in a write-protect mode when the fins are snapped off, and the notch is exposed. Alternatively, a plug device can be insertably positioned into the notch, causing the memory card to function in a read-write mode when the plug device is positioned into the notch, and in a write-protect mode when the plug device is removed and the notch is exposed.

Abstract: A flash memory controller on a PCIE bus controls flash-memory modules on a flash bus. The flash-memory modules are plane-interleaved using interleaved bits extracted from the lowest bits of the logical block index. These plane-interleave bits are split into a LSB and a MSB, with middle physical block bits between the LSB and MSB. A physical sequential address counter generates a physical block number by incrementing the plane-interleave bits before the middle physical block bits, and then relocating the MSB to above the middle physical block bits. This causes blocks to be accessed in a low-high sequence of 0, 1, 4096, 4097, 2, 3, 4098, 4099, etc. in the four planes of flash memory. A RAM physical page valid table tracks valid pages in the four planes, while a RAM mapping table stores the plane, block, and page addresses for logical sectors generated by the physical sequential address counter.

Abstract: A RAM mapping table is restored from flash memory using plane, block, and page addresses generated by a physical sequential address counter. The RAM mapping table is restored following a plane-interleaved sequence generated by the physical sequential address counter using interleaved bits extracted from the lowest bits of the logical block index. These plane-interleave bits are split into a LSB and a MSB, with middle physical block bits between the LSB and MSB. The physical sequential address counter generates a physical block number by incrementing the plane-interleave bits before the middle physical block bits, and then relocating the MSB to above the middle physical block bits. This causes blocks to be accessed in a low-high sequence of 0, 1, 4096, 4097, 2, 3, 4098, 4099, etc. in the four planes of flash memory. Background recycling and ECC writes are also performed.

Abstract: A low-profile Universal-Serial-Bus (USB) assembly includes a modular USB core component and an external case. The modular USB core component includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips (e.g., USB controller, flash memory) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. A molded housing is then formed over the IC chips and passive components such that the device has a uniform thickness. The modular USB core component is then inserted or otherwise combined with an external plastic case to provide a USB assembly. An optional carrying case is disclosed.

Abstract: A molded secured digital (SD) card having a bottom plastic piece having a plurality of lateral sides, said bottom plastic piece further having a cavity interposed along said plurality of lateral sides, in accordance with an embodiment of the present invention. The molded SD card further having a printed circuit board (PCB) assembly positioned in said cavity, one of said plurality of lateral sides of said bottom plastic piece having a notch recess, said molded SD card further having a male guide insertably positioned into said notch recess, said molded SD card further having a female switch clamped onto said male guide to form a write-protect switch.

Abstract: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an external Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip. The PCBA is encased inside an upper case and a lower case, with SD contact pads on the PCB that fit through contact openings in the upper case. Dividers between openings in the upper case that expose the SD contact pads also support the PCB at a slanted angle to the centerline of the device. The PCB slants upward at the far end to allow more thickness for the chips mounted to the bottom surface of the PCB, and slants downward at the insertion end to position the SD contact pads near the centerline. A metal switch-bar or an over-molded controller die may be substituted.

Abstract: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an external Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip. The PCBA is encased inside an upper case and a lower case, with SD contact pads on the PCB that fit through contact openings in the upper case. Dividers between openings in the upper case that expose the SD contact pads also support the PCB at a slanted angle to the centerline of the device. The PCB slants upward at the far end to allow more thickness for the chips mounted to the bottom surface of the PCB. A user-slidable switch may be slanted to compensate for the PCB slant. The PCB may have a flex section to facilitate the slant without a slanted switch.

Abstract: A flash-memory drive replaces a hard-disk drive using an integrated device electronics (IDE) interface. The flash drive has a printed-circuit board assembly (PCBA) with a circuit board with flash-memory chips and a controller chip. The controller chip includes an input/output interface circuit to an external computer over the IDE interface, and a processing unit to read blocks of data from the flash-memory chips. The PCBA is encased inside an upper case and a lower case, with an IDE connector that fits through and opening between the cases. The cases can be assembled with the PCBA by a snap-together, ultrasonic-press, screw-fastener, or thermal-bond adhesive method. Center lines formed on the inside of the cases fit between rows of flash-memory chips to improve case rigidity. The connector has two rows of pins that straddle the center line of the circuit board for a balanced design.

Abstract: A sliding window of flash blocks is used to reduce wasted space occupied by stale data in a flash memory. The sliding window slides downward over a few flash blocks. The oldest block is examined for valid pages of data, and the valid pages are copied to the end of the sliding window so that the first block has only stale pages. The first block can then be erased and eventually re-used. A RAM usage table contains valid bits for pages in each block in the sliding window. A page's valid bit is changed from an erased, unwritten state to a valid state when data is written to the page. Later, when new host data replaces that data, the old page's valid bit is set to the stale state. A RAM stale-flags table keeps track of pages that are full of stale pages.

Abstract: A secured digital (SD) card including a bottom plastic piece having a plurality of lateral sides, said bottom plastic piece further having a cavity interposed along said plurality of lateral sides, in accordance with an embodiment of the present invention. The SD card further having a top cover and a printed circuit board (PCB) assembly positioned in said cavity, said top cover for covering said PCB assembly inside said cavity, one of said plurality of lateral sides of said bottom plastic piece having a notch, said SD card further having a male guide insertably positioned inside said notch, said SD card further having a female switch clamped onto said male guide to form a write-protect switch.

Abstract: One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

Abstract: A flash memory has multi-level cells (MLC) that can each store multiple bits per cell. Blocks of cells can be downgraded to fewer bits/cell when errors occur, or for storing critical data such as boot code. The bits from a single MLC are partitioned among multiple pages to improve error correctability using Error Correction Code (ECC). An upper reference voltage is generated by a voltage reference generator in response to calibration registers that can be programmed to alter the upper reference voltage. A series of decreasing references are generated from the upper reference voltage and are compared to a bit-line voltage. Compare results are translated by translation logic that generates read data and over- and under-programming signals. Downgraded cells use the same truth table but generate fewer read data bits. Noise margins are asymmetrically improved by using the same sub-states for reading downgraded and full-density MLC cells.

Abstract: A Universal-Serial-Bus (USB) device has a USB plug with reduced wobble. A USB metal wrap around the perimeter of the USB plug is attached to a housing by overmolding. A plug supporter is inserted into the front of the USB metal wrap, and has locking tabs that snap over the inside wall of the housing. Side tabs on the plug supporter fit into side slots on the USB metal wrap to secure the plug supporter inside the USB metal wrap. A circuit board with a USB flash controller has USB metal contacts on an extension end that is inserted through the housing and into the USB metal wrap. The extension end fits underneath top tabs on the plug supporter, preventing the extension end with the USB metal contacts from upward wobble when the USB plug is inserted into a USB socket.

Abstract: A case-grounded flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips and a controller chip. The PCBA is encased inside an upper case and a lower case, with a Serial AT-Attachment (SATA) connector that fits through and opening between the cases. The cases can be assembled with the PCBA by a snap-together, ultrasonic-press, screw-fastener, or thermal-bond adhesive method. Dual-axis case-grounding pins draw any electro-static-discharges (ESD) current off the upper case along a primary axis and onto a PCBA ground through a secondary axis washer that is screwed into the PCBA. The primary axis body of the dual-axis case-grounding pins fits around a PCBA notch while the secondary axis passes through a metalized alignment hole for grounding. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the dual-axis case-grounding pins.

Abstract: A case-grounded flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips and a controller chip. The PCBA is encased inside an upper case and a lower case, with a Serial AT-Attachment (SATA) connector that fits through an opening between the cases. The cases can be assembled with the PCBA by a screw-together or thermal-bond adhesive method. Triple-axis case-grounding tabs draw any electro-static-discharges (ESD) current off the upper case along a primary axis and onto a PCBA ground through a secondary axis that is screwed into the PCBA. An intermediary axis between the primary and secondary axes fits around a PCBA notch while the secondary axis passes through a metalized alignment hole on the PCBA for grounding. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the triple-axis case-grounding tabs.

Abstract: Content on a storage medium is protected from unauthorized use, such as excessive copying or expired playback. A storage medium contains encrypted content and an encrypted content key with rules such as usage and copy rules. An interface between a record/playback device and the storage medium has enhanced security by not passing unprotected encryption keys that might be intercepted by external hackers. A content key is combined with usage and copy rules and then encrypted with a unique key, and may be doubly-encrypted with a control key before transmission over the interface. The unique key is generated from a key matrix on the record/playback device using row and columns received from the storage medium. The storage medium stores a pre-loaded copy of the unique key. The control key is generated from a random number on the record/playback device and storage medium avoiding transmission over the interface.

Abstract: A portable media player receives encrypted audio files and an encrypted content key from a central license server on the Internet. The media player supports digital rights management (DRM) by storing the encrypted audio file in its flash memory and disabling copying or playing of the audio file after a copy limit has been reached. The copy limit is a rule that is combined with the content key in a transfer key that can be encrypted together by the license server. The license server can detect cloning of the media player by reading a unique player ID from the player and detecting when too many accounts use the same unique player ID. The content key can be generated from polar coordinates of the unique player ID, player manufacturer, and song genre. A fingerprint sensor on the player can scan and compare the user's fingerprints to further detect cloning.

Abstract: A Universal-Serial-Bus (USB) device has a USB plug that is centered over a center-line of a circuit board. The circuit board with flash memory and a USB flash controller has metal pads that a USB connector is soldered to. The USB connector has a rear step that is about half the height of the USB connector plug. Contacts on the rear step are soldered to the metal pads on the circuit board so that the USB connector is centered around the edge of the circuit board. The overall height of the flash device can be reduced since the bulky USB connector is not attached off-center to the circuit board, but is attached at the half-height rear step. Both the USB connector and the circuit board share the same center line, allowing a printed-circuit board assembly (PCBA) to be symmetric around the center line.

Abstract: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an input/output interface circuit to an external computer over a Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip. The PCBA is encased inside an upper case and a lower case, with SD contact pads on the PCB that fit through contact openings in the upper case. Supporting end ribs under each of the SD contact pads and middle ribs support the PCB at a slanted angle to the centerline of the device. The PCB slants upward at the far end to allow more thickness for the chips mounted to the bottom surface of the PCB, and slants downward at the insertion end to position the SD contact pads near the centerline.

Abstract: A Multi-Media Card/Secure Digital (MMC/SD) single-chip flash device contains a MMC/SD flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. MMC/SD transactions from a host MMC/SD bus are read by a bus transceiver on the MMC/SD flash microcontroller. Various routines that execute on a CPU in the MMC/SD flash microcontroller are activated in response to commands in the MMC/SD transactions. A flash-memory controller in the MMC/SD flash microcontroller transfers data from the bus transceiver to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.