Patents by Inventor Achim Stellberger
Achim Stellberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8400124Abstract: A startup circuit for starting up a self-supplied voltage regulator which initiates startup by applying a voltage from a voltage supply to the startup circuit thus causing a voltage at an output node to rise. This rise will start the operation of the differential amplifier of the voltage regulator. When the voltage at the output node has reached the desired final output voltage, the startup circuit disconnects from the voltage regulator. The criterion for switching off the startup circuit is determined by a comparator which compares the output current capability of the voltage regulator with its output current plus the startup current. Inputs to the differential amplifier, such as the reference voltage, derive their power from the output node.Type: GrantFiled: September 21, 2010Date of Patent: March 19, 2013Assignee: Dialog Semiconductor GmbHInventors: Achim Stellberger, Frank Schwiderski
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Patent number: 8228053Abstract: Systems and methods to achieve a startup circuit of bandgap voltage reference generator circuits monitoring a current flow in the bandgap voltage reference generator circuit have been achieved. The startup circuit can operate at supply voltages of about one threshold voltage and is therefore appropriate for low voltage applications. The monitoring of a current through an electrical component inside the bandgap voltage reference generator circuit by replication the component branch in a scaled version saves power and does not disturb the normal operation of the current-mode bandgap voltage reference generator. The startup circuit invented can be applied for current-mode bandgap voltage reference generator circuits as well as for voltage-mode bandgap voltage reference generator circuits.Type: GrantFiled: July 8, 2009Date of Patent: July 24, 2012Assignee: Dialog Semiconductor GmbHInventors: Achim Stellberger, Frank Schwiderski
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Patent number: 8149250Abstract: A circuit and methods eliminating production related luminance variations of electronic display applies to all display technologies that require gamma adjustment or also adjustment of other display parameters e.g. brightness or contrast as e.g. LCD or OLED display modules are disclosed. This is performed by individual trimming of the display driver's gamma curve One alternative is that an end-user has access to a non-volatile memory and replaces the factory default settings of the gamma curve with individual settings. Another alternative is to load gamma curve parameters from the non-volatile memory to gamma control registers and perform tweaking of the gamma curve from these control registers on top of the factory default settings in the non-volatile memory.Type: GrantFiled: July 27, 2005Date of Patent: April 3, 2012Assignee: Dialog Semiconductor GmbHInventors: Helmut Burkhardt, Achim Stellberger, Paul Zehnich, Frank Kronmuller
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Publication number: 20120068673Abstract: A startup circuit for starting up a self-supplied voltage regulator which initiates startup by applying a voltage from a voltage supply to the startup circuit thus causing a voltage at an output node to rise. This rise will start the operation of the differential amplifier of the voltage regulator. When the voltage at the output node has reached the desired final output voltage, the startup circuit disconnects from the voltage regulator. The criterion for switching off the startup circuit is determined by a comparator which compares the output current capability of the voltage regulator with its output current plus the startup current. Inputs to the differential amplifier, such as the reference voltage, derive their power from the output node.Type: ApplicationFiled: September 21, 2010Publication date: March 22, 2012Inventors: Achim Stellberger, Frank Schwiderski
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Publication number: 20110006749Abstract: Systems and methods to achieve a startup circuit of bandgap voltage reference generator circuits monitoring a current flow in the bandgap voltage reference generator circuit have been achieved. The startup circuit can operate at supply voltages of about one threshold voltage and is therefore appropriate for low voltage applications. The monitoring of a current through an electrical component inside the bandgap voltage reference generator circuit by replication the component branch in a scaled version saves power and does not disturb the normal operation of the current-mode bandgap voltage reference generator. The startup circuit invented can be applied for current-mode bandgap voltage reference generator circuits as well as for voltage-mode bandgap voltage reference generator circuits.Type: ApplicationFiled: July 8, 2009Publication date: January 13, 2011Inventors: Achim Stellberger, Frank Schwiderski
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Patent number: 7830197Abstract: An integrating amplifier on an IC, which comprises a feedback loop using an external device as an integrating capacitor, has added a second feedback loop that provides an additional current to the input of the amplifier, which current can be used to increase the input range of the charge that can be measured without needing another external capacitor or pad.Type: GrantFiled: December 22, 2008Date of Patent: November 9, 2010Assignee: Dialog Semiconductor GmbHInventors: Achim Stellberger, Michael Keller, Paul Zehnich
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Publication number: 20100156501Abstract: An integrating amplifier on an IC, which comprises a feedback loop using an external device as an integrating capacitor, has added a second feedback loop that provides an additional current to the input of the amplifier, which current can be used to increase the input range of the charge that can be measured without needing another external capacitor or pad.Type: ApplicationFiled: December 22, 2008Publication date: June 24, 2010Inventors: Achim Stellberger, Michael Keller, Paul Zehnich
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Patent number: 7291551Abstract: A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and a second location of the integrated circuit device. A dielectric layer is formed overlying the bottom conductive layer. A top conductive layer is formed overlying the dielectric layer. The top conductive layer is coupled to the bottom conductive layer through openings in the dielectric layer to form a second electrical coupling of the first location and the second location. A metal wire is bonded to the top conductive layer to form a third electrical coupling of the first location and the second location to complete the very low resistivity interconnection in the manufacture of the integrated circuit device.Type: GrantFiled: March 31, 2003Date of Patent: November 6, 2007Assignee: Dialog Semiconductor GmbHInventors: Wolfgang Jörger, Achim Stellberger, Michael Keller
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Publication number: 20070013725Abstract: A circuit and methods eliminating production related luminance variations of electronic display applies to all display technologies that require gamma adjustment or also adjustment of other display parameters e.g. brightness or contrast as e.g. LCD or OLED display modules are disclosed. This is performed by individual trimming of the display driver's gamma curve One alternative is that an end-user has access to a non-volatile memory and replaces the factory default settings of the gamma curve with individual settings. Another alternative is to load gamma curve parameters from the non-volatile memory to gamma control registers and perform tweaking of the gamma curve from these control registers on top of the factory default settings in the non-volatile memory.Type: ApplicationFiled: July 27, 2005Publication date: January 18, 2007Inventors: Helmut Burkhardt, Achim Stellberger, Paul Zehnich, Frank Kronmuller
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Patent number: 7030591Abstract: A battery charging, discharging, and protection switch circuit with enhanced reverse voltage protection is achieved. The circuit comprises, first, field effect transistor (FET) switches having gate, source, drain, and bulk. The FET switches may comprise either NMOS devices or PMOS devices. Second, means of controlling the FET switch's gate and bulk are included. The FET switch gate voltage determines the OFF and ON state of said FET switches. The bulk is switchable coupled between the battery terminal and the load terminal. To achieve high voltage breakdown limits the FET switch is realized with cascaded MOSFETs, where as a novelty here under certain operating conditions, i.e. the battery charger coupled in reverse condition—one FET is working as a source follower. All the necessary MOSFET switches are integrated onto a single chip, together with its controller logic. To form these MOSFETs within a single IC together with the other circuit elements is much less expensive.Type: GrantFiled: July 25, 2003Date of Patent: April 18, 2006Assignee: Dialog Semiconductor GmbHInventor: Achim Stellberger
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Publication number: 20050017688Abstract: A battery charging, discharging, and protection switch circuit with enhanced reverse voltage protection is achieved. The circuit comprises, first, field effect transistor (FET) switches having gate, source, drain, and bulk. The FET switches may comprise either NMOS devices or PMOS devices. Second, means of controlling the FET switch's gate and bulk are included. The FET switch gate voltage determines the OFF and ON state of said FET switches. The bulk is switchable coupled between the battery terminal and the load terminal. To achieve high voltage breakdown limits the FET switch is realized with cascaded MOSFETs, where as a novelty here under certain operating conditions, i.e. the battery charger coupled in reverse condition—one FET is working as a source follower. All the necessary MOSFET switches are integrated onto a single chip, together with its controller logic. To form these MOSFETs within a single IC together with the other circuit elements is much less expensive.Type: ApplicationFiled: July 25, 2003Publication date: January 27, 2005Inventor: Achim Stellberger
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Patent number: 6710992Abstract: The invention refers to a charge/discharge protection circuit for a rechargeable battery which is protected by a fusible link, where the rechargeable battery comprises a control logic which opens or closes a load switch depending on the magnitude of the battery voltage, the voltage on the charge/discharge terminals of the protection circuit and the charge/discharge current. The protection circuit is designed so that the electric strength needs to match only the actual maximum battery voltage, thus requiring little real estate on an IC chip and also allowing most components to be integrated.Type: GrantFiled: January 24, 2002Date of Patent: March 23, 2004Assignee: Dialog Semiconductor GmbHInventors: Axel Pannwitz, Hans Martin von Staudt, Achim Stellberger
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Patent number: 6670790Abstract: A new battery charging, discharging, and protection circuit is achieved. The circuit comprises, first, a FET switch having gate, source, drain, and bulk. The FET switch may comprise either a NMOS device or a PMOS device. The source is coupled to a load terminal, and the drain is coupled to a battery terminal. Second, a means of controlling the FET switch gate and the bulk is included. The FET switch gate voltage determines the OFF and ON state of said FET switch. The bulk is switchably coupled between the battery terminal and the load terminal. A cascaded version is disclosed.Type: GrantFiled: December 14, 2001Date of Patent: December 30, 2003Assignee: Dialog Semiconductor GmbHInventor: Achim Stellberger
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Publication number: 20030190774Abstract: A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and a second location of the integrated circuit device. A dielectric layer is formed overlying the bottom conductive layer. A top conductive layer is formed overlying the dielectric layer. The top conductive layer is coupled to the bottom conductive layer through openings in the dielectric layer to form a second electrical coupling of the first location and the second location. A metal wire is bonded to the top conductive layer to form a third electrical coupling of the first location and the second location to complete the very low resistivity interconnection in the manufacture of the integrated circuit device.Type: ApplicationFiled: March 31, 2003Publication date: October 9, 2003Applicant: Dialog Semiconductor GmbHInventors: Wolfgang Jorger, Achim Stellberger, Michael Keller
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Publication number: 20030122525Abstract: A new battery charging, discharging, and protection circuit is achieved. The circuit comprises, first, a FET switch having gate, source, drain, and bulk. The FET switch may comprise either a NMOS device or a PMOS device. The source is coupled to a load terminal, and the drain is coupled to a battery terminal. Second, a means of controlling the FET switch gate and the bulk is included. The FET switch gate voltage determines the OFF and ON state of said FET switch. The bulk is switchably coupled between the battery terminal and the load terminal. A cascaded version is disclosed.Type: ApplicationFiled: December 14, 2001Publication date: July 3, 2003Applicant: Dialog Semiconductor GmbHInventor: Achim Stellberger
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Patent number: 6580250Abstract: In accordance with the objects of this invention, A battery protection circuit is achieved. The circuit comprises, first, a FET switch. Last, a control circuit determines the ON/OFF state of the FET switch. The FET switch and the control circuit comprise a single integrated circuit device. The control circuit may comprise over charge and over discharge detectors, a voltage reference, and a level shifter.Type: GrantFiled: February 28, 2002Date of Patent: June 17, 2003Assignee: Dialog Semiconductor GmbHInventors: Achim Stellberger, Michael Keller, Rolt Hülss, Frank Kronmüller
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Patent number: 6569758Abstract: A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and a second location of the integrated circuit device. A dielectric layer is formed overlying the bottom conductive layer. A top conductive layer is formed overlying the dielectric layer. The top conductive layer is coupled to the bottom conductive layer through openings in the dielectric layer to form a second electrical coupling of the first location and the second location. A metal wire is bonded to the top conductive layer to form a third electrical coupling of the first location and the second location to complete the very low resistivity interconnection in the manufacture of the integrated circuit device.Type: GrantFiled: December 3, 2001Date of Patent: May 27, 2003Assignee: Dialog Semiconductor GmbHInventors: Wolfgang Jórger, Achim Stellberger, Michael Keller
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Publication number: 20030080416Abstract: A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and a second location of the integrated circuit device. A dielectric layer is formed overlying the bottom conductive layer. A top conductive layer is formed overlying the dielectric layer. The top conductive layer is coupled to the bottom conductive layer through openings in the dielectric layer to form a second electrical coupling of the first location and the second location. A metal wire is bonded to the top conductive layer to form a third electrical coupling of the first location and the second location to complete the very low resistivity interconnection in the manufacture of the integrated circuit device.Type: ApplicationFiled: December 3, 2001Publication date: May 1, 2003Applicant: Dialog Semiconductor GmbHInventors: Wolfgang Jorger, Achim Stellberger, Michael Keller
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Publication number: 20020097543Abstract: The invention refers to a charge/discharge protection circuit for a rechargeable battery which is protected by a fusible link, where the rechargeable battery comprises a control logic which opens or closes a load switch depending on the magnitude of the battery voltage, the voltage on the charge/discharge terminals of the protection circuit and the charge/discharge current. The protection circuit is designed so that the electric strength needs to match only the actual maximum battery voltage, thus requiring little real estate on an IC chip and also allowing most components to be integrated.Type: ApplicationFiled: January 24, 2002Publication date: July 25, 2002Applicant: Dialog Semiconductor GmbHInventors: Axel Pannwitz, Hans Martin Von Staudt, Achim Stellberger