Patents by Inventor Addison Johnson

Addison Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11750188
    Abstract: The systems and methods described herein consider a first channel width of transistors of driver circuitry, where the first channel width may be set to match a second channel width of a power control transistor. A control circuit, for example, may match a second channel width of a set of power control transistors to the first channel width by turning on one or more of the set of power control transistors. Matching the width of the switches of driver circuitry and the width of the set of power control transistors may reduce losses by helping to maintain impedances of the driver circuitry.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 5, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Bret Addison Johnson, Jung-Hwa Choi
  • Publication number: 20230063347
    Abstract: A device includes a first memory die and a second memory die directly coupled to the first memory die via a first bus. The device also includes a second bus directly coupled to the first memory die. The first memory die includes a first trim circuit that when in operation adjusts a delay of signal transmission by the first memory die to a first value, while the second memory die comprises a second trim circuit that when in operation adjusts a delay of signal transmission by the second memory die by a second value.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Hari Giduturi, Bret Addison Johnson
  • Publication number: 20230063891
    Abstract: The systems and methods described herein consider a first channel width of transistors of driver circuitry, where the first channel width may be set to match a second channel width of a power control transistor. A control circuit, for example, may match a second channel width of a set of power control transistors to the first channel width by turning on one or more of the set of power control transistors. Matching the width of the switches of driver circuitry and the width of the set of power control transistors may reduce losses by helping to maintain impedances of the driver circuitry.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Bret Addison Johnson, Jung-Hwa Choi
  • Publication number: 20210319846
    Abstract: As described, a device may include detection circuitry to detect a deck of a memory array. The deck may include a conductive identifier coupled between a logic high voltage node and the detection circuitry a control circuit coupled to the detection circuit. The control circuit may perform operations including transmitting a test enable signal to the detection circuitry. The detection circuitry may generate a valid signal indicative of an existence of the conductive identifier of the deck in response to the test enable signal. The operations may also include the control circuit receiving the valid signal from the detection circuitry and adjusting a memory operation associated with the memory array based at least in part on the valid signal.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 14, 2021
    Inventors: Bret Addison Johnson, Vijayakrishna J. Vankayala
  • Patent number: 11127482
    Abstract: As described, a device may include detection circuitry to detect a deck of a memory array. The deck may include a conductive identifier coupled between a logic high voltage node and the detection circuitry a control circuit coupled to the detection circuit. The control circuit may perform operations including transmitting a test enable signal to the detection circuitry. The detection circuitry may generate a valid signal indicative of an existence of the conductive identifier of the deck in response to the test enable signal. The operations may also include the control circuit receiving the valid signal from the detection circuitry and adjusting a memory operation associated with the memory array based at least in part on the valid signal.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: September 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Bret Addison Johnson, Vijayakrishna J. Vankayala
  • Patent number: 5883300
    Abstract: A system and method for containing leaks from appliances. A fluid containment member has a bottom panel and four side panels. At least one of the side panels is movable relative to the bottom panel to allow the fluid containment member to be reconfigured among a plurality of configurations. In one configuration, one of the side walls is made substantially coplanar with the bottom panel to allow an appliance to be placed onto the bottom panel. In a second configuration all four side panels extend at an angle to the bottom panel to define a sump region that is enclosed on five sides. In a third configuration, all four side panels are substantially coplanar with the bottom panel to allow the fluid containment member to be stored in a flat configuration. Indicator means may be provided to indicate the presence of water in the sump region.
    Type: Grant
    Filed: October 3, 1997
    Date of Patent: March 16, 1999
    Inventor: Addison Johnson