Abstract: Method and System for determining a next task in an Electronic Design Automation Flow, computer system and computer program product. One or more parsers configurable to identify one or more associated pre-defined data characteristics may be executed by a processor on a task output. Selected values obtained from the parser execution may be used to make a decision about the appropriate next action to be performed in the EDA flow. Selected values may provide suggestions or decisions about the appropriate next action to be performed in the EDA flow. Input for an associated task in the EDA flow may be suggested by the selected result values.

Abstract: Method and System for determining a next task in an Electronic Design Automation Flow, computer system and computer program product. One or more parsers configurable to identify one or more associated pre-defined data characteristics may be executed by a processor on a task output. Selected values obtained from the parser execution may be used to make a decision about the appropriate next action to be performed in the EDA flow. Selected values may provide suggestions or decisions about the appropriate next action to be performed in the EDA flow. Input for an associated task in the EDA flow may be suggested by the selected result values.

Abstract: There is provided a method that includes, (a) determining a first clock frequency for shifting a first section of a scan pattern set through a path in a digital circuit such that a first power dissipated by the digital circuit while shifting the first section does not exceed a power limit, (b) determining a second clock frequency for shifting a second section of the scan pattern set through the path such that a second power dissipated by the digital circuit while shifting the second section does not exceed the power limit, (c) shifting the first section through the path at the first clock frequency, and (d) shifting the second section through the path at the second clock frequency, where first and second clock frequencies are different from one another. There is also provided a system that performs the method.

Abstract: There is provided a method that includes, (a) determining a first clock frequency for shifting a first section of a scan pattern set through a path in a digital circuit such that a first power dissipated by the digital circuit while shifting the first section does not exceed a power limit, (b) determining a second clock frequency for shifting a second section of the scan pattern set through the path such that a second power dissipated by the digital circuit while shifting the second section does not exceed the power limit, (c) shifting the first section through the path at the first clock frequency, and (d) shifting the second section through the path at the second clock frequency, where first and second clock frequencies are different from one another. There is also provided a system that performs the method.