Abstract: An LDMOSFET transistor (100) is provided which includes a substrate (101), an epitaxial drift region (104) in which a drain region (116) is formed, a first well region (107) in which a source region (112) is formed, a gate electrode (120) formed adjacent to the source region (112) to define a first channel region (14), and a grounded substrate injection suppression guard structure that includes a patterned buried layer (102) in ohmic contact with an isolation well region (103) formed in a predetermined upper region of the substrate so as to be spaced apart from the first well region (107) and from the drain region (116), where the buried layer (102) is disposed below the first well region (107) but not below the drain region (116).

Abstract: An LDMOSFET transistor (100) is provided which includes a substrate (101), an epitaxial drift region (104) in which a drain region (116) is formed, a first well region (107) in which a source region (112) is formed, a gate electrode (120) formed adjacent to the source region (112) to define a first channel region (14), and a grounded substrate injection suppression guard structure that includes a patterned buried layer (102) in ohmic contact with an isolation well region (103) formed in a predetermined upper region of the substrate so as to be spaced apart from the first well region (107) and from the drain region (116), where the buried layer (102) is disposed below the first well region (107) but not below the drain region (116).

Abstract: Methods and apparatus are provided for ESD protection of integrated passive devices (IPDs). The apparatus comprises one or more IPDs having terminals or other elements potentially exposed to ESD transients coupled by charge leakage resistances having resistance values much larger than the ordinary impedance of the IPDs at the operating frequency of interest. When the IPD is built on a semi-insulating substrate, various elements of the IPD are coupled to the substrate by spaced-apart connections so that the substrate itself provides the high value resistances coupling the elements, but this is not essential. When applied to an IPD RF coupler, the ESD tolerance increased by over 70%. The invented arrangement can also be applied to active devices and integrated circuits and to IPDs with conductive or insulating substrates.

Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (72), is provided. An insulating initial dielectric layer (32) comprising charge trapping films of, for example, aluminum nitride or silicon nitride or silicon oxide or a combination thereof, is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the initial dielectric layer (32). In an embodiment where silicon nitride or oxide is used in the initial dielectric layer (32) in contact with the silicon substrate (20), it is desirable to pre-treat the silicon surface (22) by exposing it to a surface damage causing treatment (e.g. an argon plasma) prior to depositing the initial dielectric layer, to assist in providing carrier depletion near the silicon surface around zero bias. RF loss in integrated passive devices using such silicon substrates is equal or lower than that obtained with GaAs substrates.

Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the insulating dielectric layer (32).

Abstract: Methods and apparatus are provided for ESD protection of integrated passive devices (IPDs). The apparatus comprises one or more IPDs having terminals or other elements potentially exposed to ESD transients coupled by charge leakage resistances having resistance values much larger than the ordinary impedance of the IPDs at the operating frequency of interest. When the IPD is built on a semi-insulating substrate, various elements of the IPD are coupled to the substrate by spaced-apart connections so that the substrate itself provides the high value resistances coupling the elements, but this is not essential. When applied to an IPD RF coupler, the ESD tolerance increased by over 70%. The invented arrangement can also be applied to active devices and integrated circuits and to IPDs with conductive or insulating substrates.

Abstract: A method of manufacturing a semiconductor component includes providing a substrate (110) with a surface (119), providing a layer (120) of undoped gallium arsenide over the surface of the substrate, forming a gate contact (210) over a first portion of the layer, and removing a second portion of the layer.

Abstract: A semiconductor device includes a transistor (30, 51) having a gate electrode (15, 52) wherein the gate electrode (15, 52) has a highly resistive portion (24, 25, 55). The highly resistive portion (24, 25, 55) is integrated into the gate electrode (15, 52) and is coupled to the gate electrode (15, 52) using a via-less contact method.

Abstract: A semiconductor device (20) is formed on a compound semiconductor substrate (21). The semiconductor device (20) is oriented on the surface (40) of the compound semiconductor substrate (21) such that the physical forces that result from the thermal heating or cooling of the compound semiconductor substrate (21) are essentially equal. This orientation reduces the variability of the drain to source current of the semiconductor device (20) as the semiconductor device (20) is operated at different temperatures.

Abstract: A passive element structure and method for a microwave integrated circuit reduces signal propagation losses. In one approach, a passive element (10) has an insulating layer (12) overlying a silicon substrate (14). A metal layer (16) comprising a signal line (18) and a groundplane (20) is disposed overlying the insulating layer (12), and at least a portion of the metal layer (16) contacts the substrate (14) through at least one opening (22, 24) in the insulating layer (12). The silicon substrate (14) has a resistivity greater than 2,000 ohm-cm, and the passive element (10) preferably carries signals having frequencies greater than 500 MHz. Signal losses in the passive element (10) are minimized because the charge density at the surface (15) of the substrate (14) underlying the metal layer (16) is significantly reduced. In one example, the passive element (10) is a coplanar waveguide transmission line.