Patents by Inventor Adrian C. Lee

Adrian C. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4978639
    Abstract: Metallized via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraparound plating is desired; etching off the exposed metal if necessary and forming via-holes and grooves in the wafer by reactive ion etching to a depth which is less than the total thickness of the wafer; depositing a thin conductive film along the walls of the grooves and via-holes by electroless methods; plating the walls of the grooves and the via-holes with conductive metal by electrolytic methods; removing the back surface of the wafer ("backlapping") along with the floors of both the grooves and the via-holes, to expose the metal on the wall of the via-holes and separate the individual chips; and, depositing conductive metal on the back surface of the individual chips to complete the grounding path.
    Type: Grant
    Filed: January 10, 1989
    Date of Patent: December 18, 1990
    Assignee: Avantek, Inc.
    Inventors: Chang-Hwang Hua, Simon S. Chan, Ding-Yuan S. Day, Adrian C. Lee