Abstract: To eliminate common-mode components in differential input signals without the necessity of introducing a transformer and a special feedback loop for eliminating common-mode components, a differential amplifier (1) comprises a first input stage (11) for receiving differential input signals comprising common-mode signals and for outputting first differential intermediate signals, a second input stage (12) for inverting the common-mode signals and for combining inverted common-mode signals and the first differential intermediate signals into second differential intermediate signals, and an output stage (13) for receiving the second differential intermediate signals and for outputting differential output signals.

Abstract: Relaxation oscillator comprising a chain of coupled sawtooth generator stages. Each stage has a capacitor which is charged and discharged. The charging of a capacitor begins when the voltage (C.sub.C1) of a previous stage reaches a threshold voltage (V.sub.H). To avoid sampling of noise on the threshold voltage (V.sub.H) each new voltage ramp is started gradually.

Abstract: A series arrangement of a deflection coil (Lf) and a series resistor (Rs) is connected between an output of a first output amplifier (1) and an output of a second output amplifier (2) to be driven in a bridge configuration for generating a deflection current (If) through the deflection coil (Lf). Across the series resistor (Rs), a voltage is generated which corresponds to the deflection current (If). A differential amplifier (5) has a first input connected to a first end of the series resistor (Rs). A second input of the differential amplifier (5) is connected to a second end of the series resistor (Rs) via a conversion resistor (Rc). An input current (Ii) is generated through the conversion resistor (Rc). The polarity of the input current (Ii) is selected to obtain a voltage across the conversion resistor (Rc) which has an opposite polarity with respect to the voltage across the series resistor (Rs).

Abstract: A voltage-regulating circuit comprises a series voltage stabilizer which includes a regulation element (Q.sub.1) arranged in series with an output for supplying an output voltage to a load (Z.sub.L). A comparison circuit (Q2-Q7) control the regulation element. The comparison circuit has a first input connected to a reference-voltage circuit (T3, D1) and a second input for receiving at least a part of the output voltage of the series stabilizer. A parallel stabilizer (D2) is arranged in parallel with the output of the series stabilizer. The parallel stabilizer is adapted to generate an output voltage equal to that of the series stabilizer.

Abstract: A successive approximation analog-to-digital converter whose susceptibility to errors is reduced by the use of overlapping measurement ranges in the successive conversion steps.

Abstract: A voltage-to-current converter in which the base-emitter voltage of an output transistor (T1) is compensated by means of the base-emitter junction of a transistor (T2) so that the voltage across an impedance (Z1a) in series with the output transistor is equal to the input voltage (Vi). The current through the impedance (Z1a) is then equal to the output current Io, each of which is then linearly proportional to the input voltage (Vi).

Abstract: An amplifier having floating inverting and non-inverting inputs and a stabilized direct output voltage level. The amplifier comprises a preamplifier (10) and an output amplifier stage (20). The preamplifier (10) comprises a differential amplifier which comprises a first and a second transistor (T.sub.1, T.sub.2) between whose emitters a first resistor (R.sub.1) is arranged and whose emitters are connected to the positive direct power-supply terminal (2) by a first and a second current source (I.sub.1 =I, I.sub.2 =I) respectively. The collector of the second transistor (T.sub.2) is connected to the negative power-supply terminal (3) via a third current source (I.sub.3 =3.5I) and is coupled to the output (7) of the arrangement via a second resistor (R.sub.2). Two transistors (T.sub.3, T.sub.4) having commoned bases carrying a reference voltage (V.sub.R) are arranged in cascade with the third current source (I.sub.3).

Abstract: The emitter of an input transistor (T.sub.1) of a Darlington transistor is connected to the base of an output transistor (T.sub.2). The collector of the input transistor (T.sub.1) is connected to the input of a current amplifier circuit comprising a third transistor (T.sub.3) arranged as a diode and having a first resistor (R.sub.1) arranged in its emitter circuit, and a fourth transistor (T.sub.4) having its base is connected to that of the third transistor (T.sub.3) and having a second resistor (R.sub.2) arranged in the emitter circuit. The collector of the fourth transistor (T.sub.4) is connected to the base of the output transistor (T.sub.2). The ratio between the resistance values of the first and the second resistors (R.sub.1, R.sub.2) is larger than the ratio between the emitter areas of the fourth and the third transistor (T.sub.4, T.sub.3). Thus, for small currents a low and for large currents a high current gain is obtained, so that the current gain factor of the output transistor (T.sub.

Abstract: To obtain class AB operation of a push-pull amplifier which uses a preamplifier and an output amplifier having complementary output transistors, the base-emitter voltage of the first output transistor is converted into a current by a voltage-to-current converter and this current is re-converted into a base-emitter voltage by a current-to-voltage converter and added to the base-emitter voltage of the second output transistor. The sum of said base-emitter voltages is maintained equal to a reference voltage generated across two diode-connected transistors (T.sub.7, T.sub.8) by a differential amplifier.

Abstract: A current-source arrangement supplying a current which increases directly proportionally to the supply voltage (V.sub.S) and which is suitable for operation with supply voltages above approximately 0.7 V, comprises a first resistor (R.sub.10 =R) in which a current (V.sub.S -V.sub.BE)/R flows, which current is supplied by a first transistor (T.sub.10) via a first current-mirror circuit (T.sub.11, T.sub.12) and a second current-mirror circuit (T.sub.13, T.sub.14). A second resistor (R.sub.2 =R) is arranged in parallel with the base-emitter junction of the input transistor (T.sub.11) of the first current-mirror circuit (T.sub.11, T.sub.12), through which second resistor (R.sub.2) a current V.sub.BE /R flows which is supplied by the first transistor (T.sub.10) via the collector-base interconnection of the input transistor (T.sub.11). The total current flowing through the first transistor (T.sub.10) is then equal to V.sub.S /R.

Abstract: A current source arrangement includes a first and a second transistor arranged in cascode between an output terminal and the negative power-supply terminal. The arrangement further includes a current mirror circuit, a current source connected to the positive power-supply terminal being connected to an input current path which comprises a third transistor connected as a diode, a fourth transistor connected as a diode, and the collector-emitter path of a fifth transistor, which input current path is coupled to a second current path comprising a sixth transistor whose base is connected to the base of the third transistor, a resistor, and a seventh transistor connected as a diode, whose base is connected to the base of the fifth and the second transistor. Further, the base of the first transistor is connected to the emitter of the sixth transistor.