Abstract: A method for testing a semiconductor device is disclosed. The method comprises positioning a probe card comprising a plurality of probes above the semiconductor device and moving the probe card in a vertical direction towards the semiconductor device. The plurality of probes are moving in a vertical direction towards a plurality of electrical structures of the semiconductor device until each probe of the plurality of probes has made mechanical contact with a corresponding electrical structure of the plurality of electrical structures with a minimum quantity of force. The each probe of the plurality of probes absorbs a portion of vertical overdrive after contacting their corresponding electrical structures. The probe card absorbs any remaining vertical overdrive. The vertical overdrive is a continuing vertical movement of the plurality of probes after a first probe of the plurality of probes mechanically contacts a first corresponding electrical structure.

Abstract: A method for testing using an automated test equipment is presented. The method comprises transmitting instructions for performing an automated test from a system controller to a tester processor, wherein the instructions comprise parameters for a descriptor module. The method also comprises programming a reconfigurable circuit for implementing the descriptor module onto an instantiated FPGA block coupled to the tester processor. Further, the method comprises interpreting the parameters from the descriptor module using the reconfigurable circuit, wherein the parameters control execution of a plurality of test operations on a DUT coupled to the instantiated FPGA block. Additionally, the method comprises constructing at least one packet in accordance with the parameters, wherein each one of the at least one packet comprises a command for executing a test operation on the DUT. Finally, the method comprises performing a handshake with the DUT to route the at least one packet to the DUT.

Abstract: A method for performing tests using automated test equipment (ATE) is presented. The method comprises obtaining a protocol selection for programming a programmable tester module using a graphical user interface (GUI). It further comprises accessing a configuration file associated with a protocol from a remote computer through a network. Subsequently, it comprises configuring a programmable tester module with a communication protocol for application to at least one device under test (DUT) using the configuration file. Finally, it comprises transmitting instructions to the programmable tester module for executing a program flow, wherein the program flow comprises a sequence of tests for testing the at least one DUT, and receiving results for those tests from the programmable tester module.

Abstract: Automated test equipment (ATE) capable of performing a test of semiconductor devices is presented. The ATE comprises a computer system comprising a system controller communicatively coupled to a tester processor. The system controller is operable to transmit instructions to the processor and the processor is operable to generate commands and data from the instructions for coordinating testing of a plurality of devices under test (DUTs). The ATE further comprises a plurality of FPGA components communicatively coupled to the processor via a bus. Each of the FPGA components comprises at least one hardware accelerator circuit operable to internally generate commands and data transparently from the processor for testing one of the DUTs. Additionally, the tester processor is configured to operate in one of several functional modes, wherein the functional modes are configured to allocate functionality for generating commands and data between the processor and the FPGA components.

Abstract: An apparatus and method for protecting probes used in automated testing is disclosed. The apparatus comprises a probe operable to provide power to a device under test (DUT) from a device power source (DPS), wherein the probe is coupled to a contact point on the DUT and a probe protector circuit connected to the probe in series between the DPS and the DUT. The probe protector circuit further comprises a current sense module operable to monitor a flow of current from the DPS to the DUT to determine if the current flow is below a predetermined threshold current level and a switch for controlling the connection from the DPS to the DUT. The switch is coupled to the current sense module and is operable to be used in conjunction with the current sense module to limit the current flow if it exceeds the predetermined threshold current level.

Abstract: In order to create a stable non-linear optical effect with high efficiency for a plurality of input lights having different wavelengths, according to a first aspect of the present invention, provided is a wavelength conversion apparatus comprising an input section into which input light is input; a wavelength converting section that includes a polarity inverting structure whose polarity inverts periodically and that, in response to the input of light having a wavelength corresponding to the period with which the polarity inverts, converts the wavelength of the light; and a direction changing section that changes a progression direction in which the input light passes through the polarity inverting structure, according to the wavelength of the input light, without changing relative positions of the input section and the polarity inverting structure. Also provided are a light source apparatus and a wavelength converting method.

Abstract: To measure contact pressure of each of a plurality of small protrusions arranged at a narrow pitch and contacting a flat surface, provided is a contact pressure detection apparatus comprising a sensor section that is contacted by a target and has pressure applied thereto by the target; a light source section that radiates light with a wavelength causing Raman scattering in the sensor section to which the pressure is applied; and a detecting section that receives light from the sensor section and detects the pressure between the sensor section and the target. Also provided is a contact point pressure measurement apparatus that measures contact pressure of an electrode of a device under test, comprising: a fixing section that has the device under test mounted thereon and fixes the electrode of the device under test in a manner to press against the sensor section; and the contact pressure detection apparatus.

Abstract: Provided is a converter that converts sound waves into electrical signals, comprising a piezoelectric section including a plurality of piezoelectric elements that each convert a sound wave detected by a detection surface into one of the electrical signals; and a multilayer substrate to which the piezoelectric section is fixed. The multilayer substrate includes a plurality of signal wires that correspond respectively to the piezoelectric elements and each transmit the electrical signal output by the corresponding piezoelectric element; and a shield portion that electromagnetically shields at least a portion of the signal wires. The piezoelectric section is fixed to the multilayer substrate such that a surface of the multilayer substrate on which the piezoelectric elements are fixed is inclined with respect to the detection surfaces of the piezoelectric elements.

Abstract: A handler for conveying DUTs to a socket for a test that can reduce a test time includes: a test section including the socket; a heat applying section into which a tray having plural DUTs placed on its surface is conveyed and that controls the temperature of the DUTs to a predetermined test temperature and conveys the tray into the test section; and a device image capturing section that includes imaging elements arranged along a first direction the number of which is equal to DUTs arranged along the first direction and that in the heat applying section, captures images of the DUTs by moving the imaging elements relative to the surface of the tray in a second direction non-parallel with the first direction; and a position adjusting section that adjusts the positions of the DUTs relative to the socket based on their images captured by the device image capturing section.

Abstract: A handler for conveying a plurality of devices under test to a socket for a test that can reduce a test time includes: a test section provided with the socket; a heat applying section into which a tray having a plurality of devices under test placed on its surface is conveyed and that controls the temperature of the devices under test to a predetermined test temperature and conveys the tray into the test section; a device image capturing section that in the heat applying section, captures images of the respective devices under test by moving with respect to the surface of the tray in two non-parallel directions of a first direction and a second direction; and a position adjusting section that adjusts the positions of the devices under test with respect to the socket based on the images of the devices under test captured by the device image capturing section.

Abstract: Provided is a handler apparatus which can connect devices under test to sockets of a test apparatus quickly and with low power consumption.

Abstract: A synchronization pattern generating unit generates a synchronization pattern required for a clock recovery unit which has been built into a DUT to maintain a link with an external circuit. A gate signal generating unit generates a gate signal which is asserted in a period in which a vector pattern is to be supplied to the DUT. In a first mode, a pattern selecting unit is configured such that it outputs the vector pattern during a period in which the gate signal is asserted and outputs a fixed output level during a period in which the gate signal is negated. In a second mode, the pattern selecting unit is configured such that it outputs the vector pattern during a period in which the gate signal is asserted and outputs the synchronization pattern during a period in which the gate signal is negated.

Abstract: To decrease the burden of digital processing, provided is an AD conversion apparatus comprising a pattern generating section that, for each target bit specified one bit at a time moving downward in the output data, generates a pattern signal having a pulse width or number of pulses corresponding to a weighting of the target bit; an integrating section that integrates the pattern signals according to a judgment value for judging a value of the target bit each time a pattern signal is generated, and outputs a reference signal obtained by accumulating the integrated value of each pattern signal; a comparing section that, each time generation of a pattern signal is finished, compares the input signal to the reference signal; and an output section that outputs the output data to have values corresponding to the comparison results obtained after each generation of a pattern signal corresponding to a bit is finished.

Abstract: Provided is a test module generation apparatus that generates a test module executed on a test apparatus for testing a device under test. The apparatus includes a condition file generating section in which a test condition is input and that generates a condition file specifying the input test condition, a test method storing section that stores a test method, a test method selecting section that receives, from a user, a selection instruction of the test method adapted to the test module to be generated, a condition file selecting section that receives, from a user, a selection instruction of the condition file corresponding to a parameter which the selected test method requires, and a test module generating section that generates the test module in which a test according to the selected test method is executed with a parameter specified by the condition file.

Abstract: An electromagnetic wave output device outputs an electromagnetic wave. An optical element has a total reflection surface for totally reflecting the electromagnetic wave, and causes the device under test to receive an evanescent wave generated from the total reflection surface. An electromagnetic wave detector detects the electromagnetic wave, and a spectrum deriver derives a reflectance of the electromagnetic wave on the total reflection surface or a value based on the reflectance based on a detection result by the electromagnetic wave detector while the reflectance or the value based on the reflectance is associated with the frequency of the electromagnetic wave and a manufacturing condition of the particle or the device under test. A characteristic extractor extracts a characteristic based on the manufacturing condition from a derived result by the spectrum deriver.

Abstract: In a method of manufacturing a semiconductor device using an electron beam lithography apparatus configured to emit an electron beam to perform lithography of a pattern, processing including pattern formation with the electron beam lithography apparatus is performed on a wafer, and an electric characteristic of the thus manufactured semiconductor devices is measured by a semiconductor testing apparatus. Then, electron beam lithography data to be used by the electron beam lithography apparatus is adjusted based on a result of measurement of the electric characteristic so as to reduce a variation in the electric characteristic of the semiconductor device within a surface of the wafer.

Abstract: Referring to design data for a sample, a measurement region is defined at a portion in the design data which has no step in an edge of a pattern. In addition, an edge as a characteristic portion is detected from the design data, and an edge as a characteristic portion corresponding to the characteristic portion of the design data is detected from a secondary electron image. Then, the measurement region is positioned and located in a secondary electron image based on a positional relationship between the edge of the design data and the edge of the secondary electron image. A width of the pattern is measured on the basis of a distance between the two edges included in the measurement region thus located.