Patents by Inventor Ady Levy

Ady Levy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11682570
    Abstract: A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: June 20, 2023
    Assignee: KLA Corporation
    Inventors: Pradeep Vukkadala, Mark D. Smith, Ady Levy, Prasanna Dighe, Dieter Mueller
  • Patent number: 11360398
    Abstract: A metrology system includes a controller communicatively coupled to one or more metrology tools. In another embodiment, the controller includes one or more processors configured to execute program instructions causing the one or more processors to receive one or more overlay metrology measurements of one or more metrology targets of the metrology sample from the one or more metrology tools; determine tilt from the one or more measurement overlay measurements; and determine one or more correctables for at least one of one or more lithography tools or the one or more metrology tools to adjust for the tilt, where the one or more correctables are configured to reduce an amount of tilt in the sample or overlay inaccuracy of the one or more overlay metrology measurements. The program instructions further cause the one or more processors to predict tilt with a simulator based on at least the determined tilt.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: June 14, 2022
    Assignee: KLA Corporation
    Inventors: Roie Volkovich, Paul MacDonald, Ady Levy, Jincheng Pei, Jinyan Song, Amnon Manassen
  • Publication number: 20220005714
    Abstract: A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 6, 2022
    Inventors: Pradeep Vukkadala, Mark D. Smith, Ady Levy, Prasanna Dighe, Dieter Mueller
  • Patent number: 11164768
    Abstract: A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: November 2, 2021
    Assignee: KLA Corporation
    Inventors: Pradeep Vukkadala, Mark D. Smith, Ady Levy, Prasanna Dighe, Dieter Mueller
  • Publication number: 20210149313
    Abstract: A metrology system includes a controller communicatively coupled to one or more metrology tools. In another embodiment, the controller includes one or more processors configured to execute program instructions causing the one or more processors to receive one or more overlay metrology measurements of one or more metrology targets of the metrology sample from the one or more metrology tools; determine tilt from the one or more measurement overlay measurements; and determine one or more correctables for at least one of one or more lithography tools or the one or more metrology tools to adjust for the tilt, where the one or more correctables are configured to reduce an amount of tilt in the sample or overlay inaccuracy of the one or more overlay metrology measurements. The program instructions further cause the one or more processors to predict tilt with a simulator based on at least the determined tilt.
    Type: Application
    Filed: November 2, 2020
    Publication date: May 20, 2021
    Applicant: KLA Corporation
    Inventors: Roie Volkovich, Paul MacDonald, Ady Levy, Jincheng Pei, Jinyan Song, Amnon Manassen
  • Patent number: 10475712
    Abstract: A system is disclosed. The system includes a tool cluster. The tool cluster includes a first deposition tool configured to deposit a first layer on a wafer. The tool cluster additionally includes an interferometer tool configured to obtain one or more measurements of the wafer. The tool cluster additionally includes a second deposition tool configured to deposit a second layer on the wafer. The tool cluster additionally includes a vacuum assembly. One or more correctables configured to adjust at least one of the first deposition tool or the second deposition tool are determined based on the one or more measurements. The one or more measurements are obtained between the deposition of the first layer and the deposition of the second layer without breaking the vacuum generated by the vacuum assembly.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: November 12, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Ady Levy, Mark D. Smith
  • Patent number: 10466596
    Abstract: The present disclosure is directed to a method of determining at least one correctable for a process tool. In an embodiment, the method includes the steps of: measuring one or more parameter values at one or more measurement locations of each field of a selection of measured fields of a wafer; estimating one or more parameter values for one or more locations of each field of a selection of unmeasured fields of the wafer; and determining at least one correctable for a process tool based upon the one or more parameter values measured at the one or more measurement locations of each field of the selection of measured fields of the wafer and the one or more parameter values estimated for the one or more locations of each field of the selection of unmeasured fields of the wafer.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: November 5, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Bill Pierson, Ramkumar Karur-Shanmugam, Chin-Chou Huang, Ady Levy, John Charles Robinson
  • Publication number: 20190333794
    Abstract: A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.
    Type: Application
    Filed: June 26, 2018
    Publication date: October 31, 2019
    Inventors: Pradeep Vukkadala, Mark D. Smith, Ady Levy, Prasanna Dighe, Dieter Mueller
  • Patent number: 10451412
    Abstract: Disclosed is a method for determining an overlay error between at least two layers in a multiple layer sample. An imaging optical system is used to measure multiple measured optical signals from multiple periodic targets on the sample, and the targets each have a first structure in a first layer and a second structure in a second layer. There are predefined offsets between the first and second structures A scatterometry overlay technique is used to analyze the measured optical signals of the periodic targets and the predefined offsets of the first and second structures of the periodic targets to thereby determine an overlay error between the first and second structures of the periodic targets. The scatterometry overlay technique is a phase based technique, and the imaging optical system is configured to have an illumination and/or collection numerical aperture (NA) and/or spectral band selected so that a specific diffraction order is collected and measured for the plurality of measured optical signals.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 22, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Michael Adel, Walter D. Mieher, Ibrahim Abdulhalim, Ady Levy, Michael Friedmann
  • Patent number: 10409171
    Abstract: A process control system may include a controller configured to receive after-development inspection (ADI) data after a lithography step for the current layer from an ADI tool, receive after etch inspection (AEI) overlay data after an exposure step of the current layer from an AEI tool, train a non-zero offset predictor with ADI data and AEI overlay data to predict a non-zero offset from input ADI data, generate values of the control parameters of the lithography tool using ADI data and non-zero offsets generated by the non-zero offset predictor, and provide the values of the control parameters to the lithography tool for fabricating the current layer on the at least one production sample.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: September 10, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Michael E. Adel, Amnon Manassen, William Pierson, Ady Levy, Pradeep Subrahmanyan, Liran Yerushalmi, DongSub Choi, Hoyoung Heo, Dror Alumot, John Charles Robinson
  • Patent number: 10216096
    Abstract: A lithography system includes an illumination source and a set of projection optics. The illumination source directs a beam of illumination from an off-axis illumination pole to a pattern mask. The pattern mask includes a set of pattern elements to generate a set of diffracted beams including illumination from the illumination pole. At least two diffracted beams of the set of diffracted beams received by the set of projection optics are asymmetrically distributed in a pupil plane of the set of projection optics. The at least two diffracted beams of the set of diffracted beams are asymmetrically incident on the sample to form a set of fabricated elements corresponding to an image of the set of pattern elements. The set of fabricated elements on the sample includes one or more indicators of a location of the sample along an optical axis of the set of projection optics.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: February 26, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Myungjun Lee, Mark D. Smith, Sanjay Kapasi, Stilian Pandev, Dzmitry Sanko, Pradeep Subrahmanyan, Ady Levy
  • Publication number: 20180253017
    Abstract: A process control system may include a controller configured to receive after-development inspection (ADI) data after a lithography step for the current layer from an ADI tool, receive after etch inspection (AEI) overlay data after an exposure step of the current layer from an AEI tool, train a non-zero offset predictor with ADI data and AEI overlay data to predict a non-zero offset from input ADI data, generate values of the control parameters of the lithography tool using ADI data and non-zero offsets generated by the non-zero offset predictor, and provide the values of the control parameters to the lithography tool for fabricating the current layer on the at least one production sample.
    Type: Application
    Filed: January 10, 2018
    Publication date: September 6, 2018
    Inventors: Michael E. Adel, Amnon Manassen, William Pierson, Ady Levy, Pradeep Subrahmanyan, Liran Yerushalmi, DongSub Choi, Hoyoung Heo, Dror Alumot, John Charles Robinson
  • Patent number: 10030965
    Abstract: Methods and systems for monitoring parameters characterizing a set of hot spot structures fabricated at different locations on a semiconductor wafer are presented herein. The hot spot structures are device structures that exhibit sensitivity to process variations and give rise to limitations on permissible process variations that must be enforced to prevent device failures and low yield. A trained hot spot measurement model is employed to receive measurement data generated by one or more metrology systems at one or more metrology targets and directly determine values of one or more hot spot parameters. The hot spot measurement model is trained to establish a functional relationship between one or more characteristics of a hot spot structure under consideration and corresponding measurement data associated with measurements of at least one metrology target on the same wafer. A fabrication process parameter is adjusted based on the value of a measured hot spot parameter.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: July 24, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Stilian Ivanov Pandev, Sanjay Kapasi, Mark D. Smith, Ady Levy
  • Patent number: 10024654
    Abstract: The determination of in-plane distortions of a substrate includes measuring one or more out-of-plane distortions of the substrate in an unchucked state, determining an effective film stress of a film on the substrate in the unchucked state based on the measured out-of-plane distortions of the substrate in the unchucked state, determining in-plane distortions of the substrate in a chucked state based on the effective film stress of the film on the substrate in the unchucked state and adjusting at least one of a process tool or an overlay tool based on at least one of the measured out-of-plane distortions or the determined in-plane distortions.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: July 17, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Mark D. Smith, Jose Solomon, Stuart Sherwin, Walter Mieher, Ady Levy
  • Publication number: 20180096906
    Abstract: A system is disclosed. The system includes a tool cluster. The tool cluster includes a first deposition tool configured to deposit a first layer on a wafer. The tool cluster additionally includes an interferometer tool configured to obtain one or more measurements of the wafer. The tool cluster additionally includes a second deposition tool configured to deposit a second layer on the wafer. The tool cluster additionally includes a vacuum assembly. One or more correctables configured to adjust at least one of the first deposition tool or the second deposition tool are determined based on the one or more measurements. The one or more measurements are obtained between the deposition of the first layer and the deposition of the second layer without breaking the vacuum generated by the vacuum assembly.
    Type: Application
    Filed: September 18, 2017
    Publication date: April 5, 2018
    Inventors: Ady Levy, Mark D. Smith
  • Patent number: 9903711
    Abstract: A metrology performance analysis system includes a metrology tool including one or more detectors and a controller communicatively coupled to the one or more detectors. The controller is configured to receive one or more metrology data sets associated with a metrology target from the metrology tool in which the one or more metrology data sets include one or more measured metrology metrics and the one or more measured metrology metrics indicate deviations from nominal values. The controller is further configured to determine relationships between the deviations from the nominal values and one or more selected semiconductor process variations, and determine one or more root causes of the deviations from the nominal values based on the relationships between values of the one or more metrology metrics and the one or more selected semiconductor process variations.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: February 27, 2018
    Assignee: KLA—Tencor Corporation
    Inventors: Ady Levy, Daniel Kandel, Michael E. Adel, Leonid Poslavsky, John Robinson, Tal Marciano, Barak Bringoltz, Tzahi Grunzweig, Dana Klein, Tal Itzkovich, Nadav Carmel, Nuriel Amir, Vidya Ramanathan, Janay Camp, Mark Wagner
  • Patent number: 9875946
    Abstract: Methods and systems for performing semiconductor metrology directly on device structures are presented. A measurement model is created based on measured training data collected from at least one device structure. The trained measurement model is used to calculate process parameter values, structure parameter values, or both, directly from measurement data collected from device structures of other wafers. In some examples, measurement data from multiple targets is collected for model building, training, and measurement. In some examples, the use of measurement data associated with multiple targets eliminates, or significantly reduces, the effect of under layers in the measurement result, and enables more accurate measurements. Measurement data collected for model building, training, and measurement may be derived from measurements performed by a combination of multiple, different measurement techniques.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: January 23, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Andrei V. Shchegrov, Jonathan M. Madsen, Stilian Ivanov Pandev, Ady Levy, Daniel Kandel, Michael E. Adel, Ori Tadmor
  • Patent number: 9846132
    Abstract: Disclosed are apparatus and methods for performing small angle x-ray scattering metrology. This system includes an x-ray source for generating x-rays and illumination optics for collecting and reflecting or refracting a portion of the generated x-rays towards a particular focus point on a semiconductor sample in the form of a plurality of incident beams at a plurality of different angles of incidence (AOIs). The system further includes a sensor for collecting output x-ray beams that are scattered from the sample in response to the incident beams on the sample at the different AOIs and a controller configured for controlling operation of the x-ray source and illumination optics and receiving the output x-rays beams and generating an image from such output x-rays.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: December 19, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Michael S. Bakeman, Andrei V. Shchegrov, Ady Levy, Guorong V. Zhuang, John J. Hench
  • Patent number: 9702693
    Abstract: A metrology system for determining overlay is disclosed. The system includes an optical assembly for capturing images of an overlay mark and a computer for analyzing the captured images to determine whether there is an overlay error. The mark comprises first and second regions that each include at least two separately generated working zones, juxtaposed relative to one another, configured to provide overlay information in a first direction, and include a periodic structure having coarsely segmented elements. The mark comprises third and fourth regions that each include at least two separately generated working zones, juxtaposed relative to one another, configured to provide overlay information in a second direction, and include a periodic structure having coarsely segmented elements.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: July 11, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Mark Ghinovker, Michael Adel, Walter D. Mieher, Ady Levy, Dan Wack
  • Patent number: 9576861
    Abstract: Universal target based inspection drive metrology includes designing a plurality of universal metrology targets measurable with an inspection tool and measurable with a metrology tool, identifying a plurality of inspectable features within at least one die of a wafer using design data, disposing the plurality of universal targets within the at least one die of the wafer, each universal target being disposed at least proximate to one of the identified inspectable features, inspecting a region containing one or more of the universal targets with an inspection tool, identifying one or more anomalistic universal targets in the inspected region with an inspection tool and, responsive to the identification of one or more anomalistic universal targets in the inspected region, performing one or more metrology processes on the one or more anomalistic universal metrology targets with the metrology tool.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: February 21, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Allen Park, Ellis Chang, Michael Adel, Kris Bhaskar, Ady Levy, Amir Widmann, Mark Wagner, Songnian Rong