Patents by Inventor Agnes N. Woo
Agnes N. Woo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8405152Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: October 7, 2011Date of Patent: March 26, 2013Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 8334721Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: September 6, 2011Date of Patent: December 18, 2012Assignee: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Publication number: 20120081822Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: October 7, 2011Publication date: April 5, 2012Applicant: Broadcom CorporationInventors: Agnes N. WOO, Kenneth R. Kindsfater, Fang Lu
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Patent number: 8035162Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: March 22, 2010Date of Patent: October 11, 2011Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 8013768Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2002Date of Patent: September 6, 2011Assignee: Broadcom CorporationInventors: Stephen A Jantzi, Anilkumar V Tammineedi, Jungwoo Song, Lawrence M Burns, Donald G McMullin, Agnes N Woo
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Publication number: 20100172060Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: March 22, 2010Publication date: July 8, 2010Applicant: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 7692247Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: July 26, 2007Date of Patent: April 6, 2010Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 7687858Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: January 3, 2008Date of Patent: March 30, 2010Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 7417303Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: September 15, 2006Date of Patent: August 26, 2008Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Publication number: 20080174925Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: January 3, 2008Publication date: July 24, 2008Applicant: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 7359170Abstract: A padring formed on a semi conductive substrate die provides Electro Static Discharge (ESD) protection for a Radio Frequency (RF) circuit also formed on the semi conductive substrate die. The padring includes a voltage supply rail, a ground rail, a plurality of signal pad structures, and a plurality of voltage clamps. The plurality of signal pad structures are disposed between the voltage supply rail and the ground rail. Each signal pad structure includes a signal pad that couples to the RF circuit, a voltage supply path diode disposed between and coupled between the signal pad and the voltage supply rail, and a ground path diode disposed between and coupled between the signal pad and the voltage supply rail. The plurality of voltage clamps are disposed between and coupled between the voltage supply rail and the ground rail.Type: GrantFiled: October 22, 2004Date of Patent: April 15, 2008Assignee: Broadcom CorporationInventors: Arya Reza Behzad, Agnes N. Woo, Victor Fong
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Patent number: 7115952Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: July 1, 2005Date of Patent: October 3, 2006Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Patent number: 7034610Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2004Date of Patent: April 25, 2006Assignee: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Patent number: 7013402Abstract: A circuit for applying power to mixed mode integrated circuits in a predefined sequence. The circuit includes a first circuit powered by a first voltage and a second circuit powered by a second voltage that is less than the first voltage and having the second voltage coupled to the first circuit. The circuit for applying power to mixed mode integrated circuits includes a modified I/O cell of the second circuit. The modified I/O cell has a driver transistor including a back gate terminal, a gate terminal that is driven by the second circuit, a drain terminal that is coupled to a first circuit signal, and a source terminal that is coupled to the second voltage. The circuit for applying power to mixed mode integrated circuits further includes a controller circuit coupled to the first voltage and the second voltage supplied as controller circuit inputs. The controller circuit has a plurality of controller circuit outputs.Type: GrantFiled: October 21, 2003Date of Patent: March 14, 2006Assignee: Broadcom CorporationInventor: Agnes N. Woo
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Patent number: 6963110Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: July 19, 2002Date of Patent: November 8, 2005Assignee: Broadcom CorporationInventors: Agnes N. Woo, Kenneth R. Kindsfater, Fang Lu
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Publication number: 20040232980Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: ApplicationFiled: June 7, 2004Publication date: November 25, 2004Applicant: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Patent number: 6747510Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: GrantFiled: June 7, 2002Date of Patent: June 8, 2004Assignee: Broadcom CorporationInventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
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Publication number: 20040080889Abstract: A circuit for applying power to mixed mode integrated circuits in a predefined sequence. The circuit includes a first circuit powered by a first voltage and a second circuit powered by a second voltage that is less than the first voltage and having the second voltage coupled to the first circuit. The circuit for applying power to mixed mode integrated circuits includes[[,]] a modified [[IO]] I/O cell of the second circuit. The modified [[IO]] I/O cell has a driver transistor including a back gate terminal, a gate terminal that is driven by the second circuit, a source drain terminal that is coupled to a first circuit signal, and a drain source terminal that is coupled to the second power supply voltage. The circuit for applying power to mixed mode integrated circuits further includes[[,]] a controller circuit coupled to the first voltage and the second voltage supplied as controller circuit inputs.Type: ApplicationFiled: October 21, 2003Publication date: April 29, 2004Applicant: Broadcom CorporationInventor: Agnes N. Woo
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Patent number: 6671816Abstract: A circuit for applying power to mixed mode integrated circuits in a predefined sequence. The circuit includes a first circuit powered by a first voltage and a second circuit powered by a second voltage that is less than the first voltage and having the second voltage coupled to the first circuit. The circuit for applying power to mixed mode integrated circuits includes a modified I/O cell of the second circuit. The modified I/O cell has a driver transistor including a back gate terminal, a gate terminal that is driven by the second circuit, a drain terminal that is coupled to a first circuit signal, and a source terminal that is coupled to the second voltage. The circuit for applying power to mixed mode integrated circuits further includes a controller circuit coupled to the first voltage and the second voltage supplied as controller circuit inputs. The controller circuit has a plurality of controller circuit outputs.Type: GrantFiled: June 29, 2000Date of Patent: December 30, 2003Assignee: Broadcom CorporationInventor: Agnes N. Woo
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Publication number: 20020188957Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.Type: ApplicationFiled: June 7, 2002Publication date: December 12, 2002Inventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo