Patents by Inventor Ahmed Abdel Monem Youssef
Ahmed Abdel Monem Youssef has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9723560Abstract: An apparatus includes a first amplifier stage configured to amplify a first carrier signal. The apparatus includes a second amplifier stage configured to amplify a second carrier signal. A resistive-capacitive (RC) network is coupled to the first amplifier stage and to the second amplifier stage. The RC network includes a resistive element coupled to a capacitive element.Type: GrantFiled: March 4, 2015Date of Patent: August 1, 2017Assignee: QUALCOMM IncorporatedInventors: Ahmed Abdel Monem Youssef, Wingching Vincent Leung, Rui Xu, Udara Charman Fernando, Ketan Humnabadkar, Tsai-Chen Huang, Li-Chung Chang
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Patent number: 9608437Abstract: Techniques for improving electro-static discharge (ESD) performance in integrated circuits (IC's). In an aspect, one or more protective diodes are provided between various nodes of the IC. For example, protective diode(s) may be provided between the drain and gate of an amplifier input transistor, and/or between the drain and ground, etc. In certain exemplary embodiments, the amplifier may be a cascode amplifier. Further aspects for effectively dealing with ESD phenomena are described.Type: GrantFiled: September 12, 2013Date of Patent: March 28, 2017Assignee: Qualcomm IncorporatedInventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Li-Chung Chang, Ehab Ahmed Sobhy Abdel Ghany
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Patent number: 9559640Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.Type: GrantFiled: February 26, 2015Date of Patent: January 31, 2017Assignee: QUALCOMM IncorporatedInventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Eugene Robert Worley, Dongling Pan, Li-Chung Chang
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Publication number: 20170023957Abstract: An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.Type: ApplicationFiled: October 10, 2016Publication date: January 26, 2017Inventors: Frederic Bossu, Ahmed Abdel Monem Youssef, Tsai-Pi Hung, Prasad Srinivasa Siva Gudem
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Patent number: 9488996Abstract: An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.Type: GrantFiled: April 20, 2015Date of Patent: November 8, 2016Assignee: Qualcomm IncorporatedInventors: Frederic Bossu, Ahmed Abdel Monem Youssef, Tsai-Pi Hung, Prasad Srinivasa Siva Gudem
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Patent number: 9479131Abstract: An apparatus includes a first amplification stage configured to amplify a first carrier signal and a second amplification stage configured to amplify a second carrier signal. The first amplification stage is direct-current (DC) coupled to the second amplification stage. First circuitry is coupled to the first amplification stage and configured to control a first gain of the first amplification stage. The first circuitry includes a first gain control transistor configured to selectively divert a first bleed current from a first output of the first amplification stage. Second circuitry is coupled to the second amplification stage and configured to control a second gain of the second amplification stage independently of the first gain. The second circuitry includes a second gain control transistor configured to selectively divert a second bleed current from a second output of the second amplification stage.Type: GrantFiled: March 10, 2015Date of Patent: October 25, 2016Assignee: Qualcomm IncorporatedInventors: Ahmed Abdel Monem Youssef, Ehab Ahmed Sobhy Abdel Ghany, Li-Chung Chang
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Patent number: 9467104Abstract: A device includes at least one first amplifier circuit configurable to receive and amplify an input radio frequency (RF) signal having a first carrier at a first input signal level and provide a first amplified RF signal, and at least one second amplifier circuit configurable to receive and amplify the input RF signal having a second carrier at a second input signal level and provide a second amplified RF signal, the at least one first amplifier circuit having a first input impedance, the at least one second amplifier circuit having a second input impedance.Type: GrantFiled: March 28, 2014Date of Patent: October 11, 2016Assignee: Qualcomm IncorporatedInventors: Rui Xu, Allen He, Wingching Vincent Leung, Ahmed Abdel Monem Youssef, Ehab Ahmed Sobhy Abdel Ghany, Sang Hyun Woo, Li-Chung Chang
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Publication number: 20160254789Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.Type: ApplicationFiled: February 26, 2015Publication date: September 1, 2016Inventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Eugene Robert Worley, Dongling Pan, Li-Chung Chang
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Patent number: 9425746Abstract: A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.Type: GrantFiled: March 28, 2014Date of Patent: August 23, 2016Assignee: Qualcomm IncorporatedInventors: Mehmet Uzunkol, Rui Xu, Ahmed Abdel Monem Youssef, Wingching Vincent Leung, Ehab Ahmed Sobhy Abdel Ghany, Allen He, Sang Hyun Woo, Li-Chung Chang
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Patent number: 9425832Abstract: A device includes a first amplifier circuit coupled to a first transformer and a second transformer, the first transformer selectively coupled to a first shared power distribution network through a first switch, the second transformer selectively coupled to a second shared power distribution network through a second switch.Type: GrantFiled: April 18, 2014Date of Patent: August 23, 2016Assignee: Qualcomm IncorporatedInventors: Ahmed Abdel Monem Youssef, Mehmet Uzunkol, Rui Xu, Ehab Ahmed Sobhy Abdel Ghany, Wingching Vincent Leung, Sang Hyun Woo, Allen He, Li-Chung Chang
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Patent number: 9407379Abstract: An apparatus for reducing a harmonic response in an electronic circuit is provided. The apparatus includes an RF input configured to provide a first signal operating at a radio frequency. The apparatus includes a local oscillator configured to produce a second signal operating at a local oscillator (LO) frequency. The apparatus includes a switching mixer configured to mix the first and second signals. The apparatus includes a notch filter comprising an inductor and a capacitor connected in parallel. The notch filter is directly coupled to an input of the switching mixer in series. The notch filter is tuned such that its resonant frequency is a harmonic of the LO frequency signal. In an aspect, the apparatus also includes a transformer configured to provide the first signal. In an aspect the apparatus also includes a second notch filter comprising a second inductor and a second capacitor connected in parallel.Type: GrantFiled: October 16, 2014Date of Patent: August 2, 2016Assignee: QUALCOMM IncorporatedInventors: Wing Fat Andy Lau, Jorge Andres Garcia, David Zixiang Yang, Ahmed Abdel Monem Youssef
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Publication number: 20160112146Abstract: An apparatus for reducing a harmonic response in an electronic circuit is provided. The apparatus includes an RF input configured to provide a first signal operating at a radio frequency. The apparatus includes a local oscillator configured to produce a second signal operating at a local oscillator (LO) frequency. The apparatus includes a switching mixer configured to mix the first and second signals. The apparatus includes a notch filter comprising an inductor and a capacitor connected in parallel. The notch filter is directly coupled to an input of the switching mixer in series. The notch filter is tuned such that its resonant frequency is a harmonic of the LO frequency signal. In an aspect, the apparatus also includes a transformer configured to provide the first signal. In an aspect the apparatus also includes a second notch filter comprising a second inductor and a second capacitor connected in parallel.Type: ApplicationFiled: October 16, 2014Publication date: April 21, 2016Inventors: Wing Fat Andy LAU, Jorge Andres GARCIA, David Zixiang YANG, Ahmed Abdel Monem YOUSSEF
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Patent number: 9277641Abstract: Techniques for routing and shielding signal lines to improve isolation between the signal lines are disclosed. In an exemplary design, an apparatus includes first, second, and third signal lines and a switch. The first, second, and third signal lines are configurable to carry first, second, and third signals, respectively. The switch is coupled between the second signal line and AC ground and is closed when the second signal line is not carrying the second signal. The second signal line isolates the first and third signal lines when the switch is closed. Adjacent signal lines are not active at the same time. A signal line may include positive and negative signal lines, which may have at least one cross over in order to cancel coupling between the positive and negative signal lines.Type: GrantFiled: April 4, 2013Date of Patent: March 1, 2016Assignee: Qualcomm IncorporatedInventors: Ahmed Abdel Monem Youssef, Li-Chung Chang, Ehab Ahmed Sobhy Abdel Ghany, Rui Xu, Wingching Vincent Leung, Allen He
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Publication number: 20150346743Abstract: An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.Type: ApplicationFiled: April 20, 2015Publication date: December 3, 2015Inventors: Frederic Bossu, Ahmed Abdel Monem Youssef, Tsai-Pi Hung, Prasad Srinivasa Siva Gudem
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Publication number: 20150341007Abstract: An apparatus includes a first amplification stage configured to amplify a first carrier signal and a second amplification stage configured to amplify a second carrier signal. The first amplification stage is direct-current (DC) coupled to the second amplification stage. First circuitry is coupled to the first amplification stage and configured to control a first gain of the first amplification stage. The first circuitry includes a first gain control transistor configured to selectively divert a first bleed current from a first output of the first amplification stage. Second circuitry is coupled to the second amplification stage and configured to control a second gain of the second amplification stage independently of the first gain. The second circuitry includes a second gain control transistor configured to selectively divert a second bleed current from a second output of the second amplification stage.Type: ApplicationFiled: March 10, 2015Publication date: November 26, 2015Inventors: Ahmed Abdel Monem Youssef, Ehab Ahmed Sobhy Abdel Ghany, Li-Chung Chang
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Publication number: 20150341859Abstract: An apparatus includes a first amplifier stage configured to amplify a first carrier signal. The apparatus includes a second amplifier stage configured to amplify a second carrier signal. A resistive-capacitive (RC) network is coupled to the first amplifier stage and to the second amplifier stage. The RC network includes a resistive element coupled to a capacitive element.Type: ApplicationFiled: March 4, 2015Publication date: November 26, 2015Inventors: Ahmed Abdel Monem Youssef, Wingching Vincent Leung, Rui Xu, Udara Charman Fernando, Ketan Humnabadkar, Tsai-Chen Huang, Li-Chung Chang
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Publication number: 20150280661Abstract: A device includes at least one first amplifier circuit configurable to receive and amplify an input radio frequency (RF) signal having a first carrier at a first input signal level and provide a first amplified RF signal, and at least one second amplifier circuit configurable to receive and amplify the input RF signal having a second carrier at a second input signal level and provide a second amplified RF signal, the at least one first amplifier circuit having a first input impedance, the at least one second amplifier circuit having a second input impedance.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Applicant: QUALCOMM IncorporatedInventors: Rui Xu, Allen He, Wingching Vincent Leung, Ahmed Abdel Monem Youssef, Ehab Ahmed Sobhy Abdel Ghany, Sang Hyun Woo, Li-Chung Chang
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Publication number: 20150280651Abstract: A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Applicant: QUALCOMM IncorporatedInventors: Mehmet Uzunkol, Rui Xu, Ahmed Abdel Monem Youssef, Wingching Vincent Leung, Ehab Ahmed Sobhy Abdel Ghany, Allen He, Sang Hyun Woo, Li-Chung Chang
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Publication number: 20150200690Abstract: A device includes a first amplifier circuit coupled to a first transformer and a second transformer, the first transformer selectively coupled to a first shared power distribution network through a first switch, the second transformer selectively coupled to a second shared power distribution network through a second switch.Type: ApplicationFiled: April 18, 2014Publication date: July 16, 2015Applicant: QUALCOMM IncorporatedInventors: Ahmed Abdel Monem Youssef, Mehmet Uzunkol, Rui Xu, Ehab Ahmed Sobhy Abdel Ghany, Wingching Vincent Leung, Sang Hyun Woo, Allen He, Li-Chung Chang
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Publication number: 20150070803Abstract: Techniques for improving electro-static discharge (ESD) performance in integrated circuits (IC's). In an aspect, one or more protective diodes are provided between various nodes of the IC. For example, protective diode(s) may be provided between the drain and gate of an amplifier input transistor, and/or between the drain and ground, etc. In certain exemplary embodiments, the amplifier may be a cascode amplifier. Further aspects for effectively dealing with ESD phenomena are described.Type: ApplicationFiled: September 12, 2013Publication date: March 12, 2015Applicant: QUALCOMM IncorporatedInventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Li-Chung Chang, Ehab Ahmed Sobhy Abdel Ghany