Abstract: Systems, apparatuses, and methods for implementing a memory sampling based migrating page cache are disclosed. In one embodiment, a system includes one or more processors and a multi-level memory hierarchy. The system is configured to record metadata associated with a portion of memory access instructions executed by one or more processors in one or more sampling intervals. The system generates predictions on which memory pages will be accessed in a subsequent sampling interval based on the recorded metadata. The system migrates one or more memory pages to a first memory level from a second memory level responsive to predicting that the one or more memory pages will be accessed in the subsequent sampling interval. The system also adjusts a duration of the sampling interval based on the number of memory accesses or a number of page faults per interval.

Abstract: Systems, apparatuses, and methods for implementing a memory sampling based migrating page cache are disclosed. In one embodiment, a system includes one or more processors and a multi-level memory hierarchy. The system is configured to record metadata associated with a portion of memory access instructions executed by one or more processors in one or more sampling intervals. The system generates predictions on which memory pages will be accessed in a subsequent sampling interval based on the recorded metadata. The system migrates one or more memory pages to a first memory level from a second memory level responsive to predicting that the one or more memory pages will be accessed in the subsequent sampling interval. The system also adjusts a duration of the sampling interval based on the number of memory accesses or a number of page faults per interval.