Patents by Inventor Ai-Tee Ang

Ai-Tee Ang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10109612
    Abstract: Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a method of using a tool for processing semiconductor devices includes a tool with a second material disposed over a first material, and a plurality of apertures disposed within the first material and the second material. The second material comprises a higher reflectivity than the first material. Each of the apertures is adapted to retain a package component over a support during an exposure to energy.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: October 23, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kuei-Wei Huang, Hsiu-Jen Lin, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20180166308
    Abstract: Presented herein is a device processing boat comprising a base and at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit. The at least one recess is aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base. The sensel is configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 14, 2018
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9911633
    Abstract: Presented herein is a device processing boat comprising a base and at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit. The at least one recess is aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base. The sensel is configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: March 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9888527
    Abstract: Systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a system for processing semiconductor devices includes a radiation energy source, a support, and a tool disposable between the support and the radiation energy source. The tool includes apertures adapted to retain a package component over the support. The system includes a cooling device proximate the support.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: February 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiu-Jen Lin, Wei-Yu Chen, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20180019151
    Abstract: A method comprises forming a plurality of interconnect structures including a dielectric layer, a metal line and a redistribution line over a carrier, attaching a semiconductor die on a first side of the plurality of interconnect structures, forming an underfill layer between the semiconductor die and the plurality of interconnect structures, mounting a top package on the first side the plurality of interconnect structures, wherein the top package comprises a plurality of conductive bumps, forming an encapsulation layer over the first side of the plurality of interconnect structures, wherein the top package is embedded in the encapsulation layer, detaching the carrier from the plurality of interconnect structures and mounting a plurality of bumps on a second side of the plurality of interconnect structures.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 18, 2018
    Inventors: Chih-Wei Lin, Hui-Min Huang, Ai-Tee Ang, Yu-Peng Tsai, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9768048
    Abstract: A device comprises a top package mounted on a bottom package, wherein the bottom package comprises a plurality of interconnection components and the bottom package comprises a plurality of first bumps formed on a first side of the bottom package, a semiconductor die is bonded on a second side of the bottom package, wherein the semiconductor die is electrically coupled to the first bumps through the interconnection components and the semiconductor die is located between the top package and the bottom package, and an underfill layer formed between the top package and the bottom package.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: September 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Lin, Hui-Min Huang, Ai-Tee Ang, Yu-Peng Tsai, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9576888
    Abstract: A device comprises a bottom package comprising a plurality of metal bumps formed on a first side of the bottom package and a plurality of first bumps formed on a second side of the bottom package, a top package bonded on the bottom package, wherein the top package comprises a plurality of second bumps, and wherein second bumps and respective metal bumps form a joint structure and an underfill layer formed between the top package and the bottom package, wherein the metal bumps are embedded in the underfill layer.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Chun-Cheng Lin, Wei-Yu Chen, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20160358797
    Abstract: Presented herein is a device processing boat comprising a base and at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit. The at least one recess is aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base. The sensel is configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20160343698
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Application
    Filed: August 4, 2016
    Publication date: November 24, 2016
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9437564
    Abstract: A structure comprises a passivation layer formed over a semiconductor substrate, a connection pad enclosed by the passivation layer, a redistribution layer formed over the passivation layer, wherein the redistribution layer is connected to the connection pad, a bump formed over the redistribution layer, wherein the bump is connected to the redistribution layer and a molding compound layer formed over the redistribution layer. The molding compound layer comprises a flat portion, wherein a bottom portion of the bump is embedded in the flat portion of the molding compound layer and a protruding portion, wherein a middle portion of the bump is surrounded by the protruding portion of the molding compound layer.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hsiung Lu, Hsuan-Ting Kuo, Cheng-Ting Chen, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9427818
    Abstract: Presented herein is a device comprising a device processing boat comprising a base at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit, the at least one recess aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base and having the sensel configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: August 30, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9418971
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: August 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9373603
    Abstract: Reflow processes and apparatuses are disclosed. A process includes enclosing a package workpiece in an enclosed environment of a chamber of a reflow tool; causing an oxygen content of the enclosed environment of the chamber to be less than 40 ppm; and performing a reflow process in the enclosed environment of the chamber while the oxygen content is less than 40 ppm. An apparatus includes a reflow chamber, a door to the reflow chamber, an energy source in the reflow chamber, and gas supply equipment coupled to the chamber. The door is operable to enclose an environment in the reflow chamber. The energy source is operable to increase a temperature in the environment in the reflow chamber. The gas supply equipment is operable to provide a gas to the reflow chamber.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: June 21, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Cheng-Ting Chen, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20150249062
    Abstract: Reflow processes and apparatuses are disclosed. A process includes enclosing a package workpiece in an enclosed environment of a chamber of a reflow tool; causing an oxygen content of the enclosed environment of the chamber to be less than 40 ppm; and performing a reflow process in the enclosed environment of the chamber while the oxygen content is less than 40 ppm. An apparatus includes a reflow chamber, a door to the reflow chamber, an energy source in the reflow chamber, and gas supply equipment coupled to the chamber. The door is operable to enclose an environment in the reflow chamber. The energy source is operable to increase a temperature in the environment in the reflow chamber. The gas supply equipment is operable to provide a gas to the reflow chamber.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 3, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Cheng-Ting Chen, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20150206779
    Abstract: Presented herein is a device comprising a device processing boat comprising a base at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit, the at least one recess aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base and having the sensel configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Application
    Filed: January 20, 2014
    Publication date: July 23, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20150201462
    Abstract: Systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a system for processing semiconductor devices includes a radiation energy source, a support, and a tool disposable between the support and the radiation energy source. The tool includes apertures adapted to retain a package component over the support. The system includes a cooling device proximate the support.
    Type: Application
    Filed: January 14, 2014
    Publication date: July 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiu-Jen Lin, Wei-Yu Chen, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20150171051
    Abstract: Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a tool for processing semiconductor devices includes a second material disposed over a first material, and a plurality of apertures disposed within the first material and the second material. The second material comprises a higher reflectivity than the first material. Each of the apertures is adapted to retain a package component over a support.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 18, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Wei Huang, Hsiu-Jen Lin, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20150014851
    Abstract: A structure comprises a passivation layer formed over a semiconductor substrate, a connection pad enclosed by the passivation layer, a redistribution layer formed over the passivation layer, wherein the redistribution layer is connected to the connection pad, a bump formed over the redistribution layer, wherein the bump is connected to the redistribution layer and a molding compound layer formed over the redistribution layer. The molding compound layer comprises a flat portion, wherein a bottom portion of the bump is embedded in the flat portion of the molding compound layer and a protruding portion, wherein a middle portion of the bump is surrounded by the protruding portion of the molding compound layer.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 15, 2015
    Inventors: Wen-Hsiung Lu, Hsuan-Ting Kuo, Cheng-Ting Chen, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8900922
    Abstract: A method includes laminating a Non-Conductive Film (NCF) over a first package component, and bonding a second package component on the first package component. The NCF and the second package component are on a same side of the first package component. Pillars of a mold tool are then forced into the NCF to form openings in the NCF. The connectors of the first package component are exposed through the openings.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Lin, Kuei-Wei Huang, Ai-Tee Ang, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8853002
    Abstract: Methods for assembling metal bump dies. In an embodiment, a method includes providing an integrated circuit die having a plurality of conductive terminals; depositing solder to form solder depositions on the conductive terminals; providing a substrate having a die attach region on a surface for receiving the integrated circuit die, the substrate having a plurality of conductive traces formed in the die attach region; aligning the integrated circuit die and the substrate and bringing the plurality of conductive terminals and the conductive traces into contact, so that the solder depositions physically contact the conductive traces; and selectively heating the integrated circuit die and the conductive terminals to a temperature sufficient to cause the solder depositions to melt and reflow, forming solder connections between the conductive traces on the substrate and the conductive terminals on the integrated circuit die. Various energy sources are disclosed for the selective heating.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: October 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiu-Jen Lin, Ai-Tee Ang, Yu-Jen Tseng, Yu-Peng Tsai, Ming-Da Cheng, Chung-Shi Liu