Patents by Inventor Aiko Mizusawa
Aiko Mizusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9640478Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: GrantFiled: June 25, 2015Date of Patent: May 2, 2017Assignee: AOI ELECTRONICS CO., LTD.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Publication number: 20150318244Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: ApplicationFiled: June 25, 2015Publication date: November 5, 2015Applicant: TERA PROBE, INC.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Patent number: 9070638Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: GrantFiled: September 26, 2014Date of Patent: June 30, 2015Assignee: TERA PROBE, INC.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Publication number: 20150008579Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: ApplicationFiled: September 26, 2014Publication date: January 8, 2015Applicant: TERA PROBE, INC.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Patent number: 8871627Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: GrantFiled: November 15, 2013Date of Patent: October 28, 2014Assignee: Tera Probe, Inc.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Publication number: 20140073090Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: ApplicationFiled: November 15, 2013Publication date: March 13, 2014Applicant: TERAMIKROS, INC.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Patent number: 8587124Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: GrantFiled: June 4, 2008Date of Patent: November 19, 2013Assignee: Teramikros, Inc.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Patent number: 7816790Abstract: A semiconductor device includes a semiconductor substrate and low dielectric film wiring line laminated structure portions which are provided in regions on the semiconductor substrate except a peripheral portion thereof. Each of the laminated structure portions has a laminated structure of low dielectric films and a plurality of wiring lines. An insulating film is provided on an upper side of the laminated structure portion. Connection pad portions for electrodes are arranged on the insulating film to be electrically connected to the connection pad portions of uppermost wiring lines of the laminated structure portion. Bump electrodes for external connection are provided on the connection pad portions for the electrodes. A sealing film is provided on the insulating film and on the peripheral portion of the semiconductor substrate. Side surfaces of the laminated structure portions are covered with the insulating film or the sealing film.Type: GrantFiled: December 14, 2006Date of Patent: October 19, 2010Assignee: Casio Computer Co., Ltd.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi
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Publication number: 20090079072Abstract: A semiconductor device includes a semiconductor substrate having an integrated circuit. A low dielectric film wiring line laminated structure portion is provided on the semiconductor substrate except a peripheral portion thereof, and is constituted by low dielectric films and wiring lines. The low dielectric film has a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the laminated structure portion. A connection pad portion is arranged on the insulating film and connected to a connection pad portion of an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film is provided on the insulating film which surrounds the pump electrode and on the peripheral portion of the semiconductor substrate. The side surfaces of the laminated structure portion are covered with the insulating film or the sealing film.Type: ApplicationFiled: December 13, 2007Publication date: March 26, 2009Applicant: Casio Computer Co., Ltd.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Publication number: 20090079073Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the pump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.Type: ApplicationFiled: June 4, 2008Publication date: March 26, 2009Applicant: Casio Computer Co., Ltd.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
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Publication number: 20070267743Abstract: A semiconductor device includes a semiconductor substrate and low dielectric film wiring line laminated structure portions which are provided in regions on the semiconductor substrate except a peripheral portion thereof. Each of the laminated structure portions has a laminated structure of low dielectric films and a plurality of wiring lines. An insulating film is provided on an upper side of the laminated structure portion. Connection pad portions for electrodes are arranged on the insulating film to be electrically connected to the connection pad portions of uppermost wiring lines of the laminated structure portion. Bump electrodes for external connection are provided on the connection pad portions for the electrodes. A sealing film is provided on the insulating film and on the peripheral portion of the semiconductor substrate. Side surfaces of the laminated structure portions are covered with the insulating film or the sealing film.Type: ApplicationFiled: December 14, 2006Publication date: November 22, 2007Applicant: CASIO COMPUTER CO., LTD.Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi