Patents by Inventor Aishwarya Dubey

Aishwarya Dubey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240075876
    Abstract: A technique for rendering an under-vehicle view including obtaining a first location of a vehicle, the vehicle having a set of cameras disposed about the vehicle, capturing a set of images; storing images of the set of images in a memory, wherein the images are associated with a time the images were captured, moving the vehicle to a second location, obtaining the second location of the vehicle, determining an amount of time for moving the vehicle from the first location to the second location, generating a set of motion data, the motion data indicating a relationship between the second location of the vehicle and the first location of the vehicle, obtaining one or more stored images from the memory based on the determined amount of time, rendering a view under the vehicle based on the one or more stored images and set of motion data, and outputting the rendered view.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Inventors: Hemant Vijay Kumar HARIYANI, Aishwarya DUBEY, Mihir Narendra MODY
  • Patent number: 11895326
    Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 6, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Aishwarya Dubey, Shashank Dabral, Veeramanikandan Raju
  • Patent number: 11858420
    Abstract: A technique for rendering an under-vehicle view including obtaining a first location of a vehicle, the vehicle having a set of cameras disposed about the vehicle, capturing a set of images; storing images of the set of images in a memory, wherein the images are associated with a time the images were captured, moving the vehicle to a second location, obtaining the second location of the vehicle, determining an amount of time for moving the vehicle from the first location to the second location, generating a set of motion data, the motion data indicating a relationship between the second location of the vehicle and the first location of the vehicle, obtaining one or more stored images from the memory based on the determined amount of time, rendering a view under the vehicle based on the one or more stored images and set of motion data, and outputting the rendered view.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: January 2, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Hemant Vijay Kumar Hariyani, Aishwarya Dubey, Mihir Narendra Mody
  • Publication number: 20230258454
    Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventors: Rahul Gulati, Aishwarya Dubey, Nainala Vyagrheswarudu, Vasant Easwaran, Prashant Dinkar Karandikar, Mihir Mody
  • Patent number: 11682099
    Abstract: A hardware accelerator for computing integral image values of an image is provided that includes a plurality of row computation components configurable to operate in parallel to compute row sum values of respective rows of a row block of the image. The hardware accelerator is further configured to compute integral image values for the row block using the row sum values and block pivots.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: June 20, 2023
    Assignee: Texas Instruments Incorporated
    Inventor: Aishwarya Dubey
  • Publication number: 20230166659
    Abstract: A technique for rendering an under-vehicle view including obtaining a first location of a vehicle, the vehicle having a set of cameras disposed about the vehicle, capturing a set of images; storing images of the set of images in a memory, wherein the images are associated with a time the images were captured, moving the vehicle to a second location, obtaining the second location of the vehicle, determining an amount of time for moving the vehicle from the first location to the second location, generating a set of motion data, the motion data indicating a relationship between the second location of the vehicle and the first location of the vehicle, obtaining one or more stored images from the memory based on the determined amount of time, rendering a view under the vehicle based on the one or more stored images and set of motion data, and outputting the rendered view.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 1, 2023
    Inventors: Hemant Vijay Kumar HARIYANI, Aishwarya DUBEY, Mihir Narendra MODY
  • Publication number: 20230171397
    Abstract: A technique including capturing, by one or more cameras of a set of cameras disposed about a vehicle, one or more images, wherein a surround view system of the vehicle is configured to render a surround view image using a first hardware accelerator based on the one or more images, determining that a first hardware accelerator is unavailable, and rendering the surround view image using a second hardware accelerator based on the captured one or more images.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Shashank DABRAL, Aishwarya DUBEY, Gowtham Abhilash TAMMANA
  • Patent number: 11662211
    Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: May 30, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rahul Gulati, Aishwarya Dubey, Nainala Vyagrheswarudu, Vasant Easwaran, Prashant Dinkar Karandikar, Mihir Mody
  • Publication number: 20230111755
    Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 13, 2023
    Inventors: Aishwarya DUBEY, Shashank DABRAL, Veeramanikandan RAJU
  • Publication number: 20230064481
    Abstract: An electronic device, comprising one or more processors, wherein the one or more processors are configured to execute instructions causing the one or more processors to: receive a machine learning (ML) model and execution information associated with the ML model, wherein the execution information including first execution data indicating how to execute the ML model optimized based on a first performance criterion, and second execution data execution data indicating how to execute the ML model optimized based on a second performance criteria, the second performance criterion different from the first performance criteria; execute the ML model based on the first execution data; determine to execute the ML model based on the second execution data; and execute the ML model based on the second execution data.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Tarkesh PANDE, Rishabh GARG, Pramod Kumar SWAMI, Kumar DESAPPAN, Aishwarya DUBEY
  • Patent number: 11570468
    Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 31, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Aishwarya Dubey, Shashank Dabral, Veeramanikandan Raju
  • Patent number: 11528453
    Abstract: Techniques including obtaining a first location of a vehicle, the vehicle having two or more cameras disposed about the vehicle, each camera associated with a physical camera pose, capturing, by a first camera, a first image of a first area in a first field of view, associating the first image with the first location of the vehicle when the first image was captured, moving the vehicle in a direction so that the first area is in an expected second field of view of a second camera, wherein the second camera is not capturing images, obtaining a second location of the vehicle, determining a temporal camera pose based on a first physical camera pose, a second physical camera pose, and the second location of the vehicle, and rendering a view of the first area from the expected second field of view of the second camera based on the first image.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: December 13, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Shashank Dabral, Aishwarya Dubey, Martin Fritz Mueller
  • Publication number: 20220375238
    Abstract: A method for identifying regions of interest (ROIs) includes receiving, by a processor from a video camera, a video image and computing, by the processor, an optical flow image, based on the video image. The method also includes computing, by the processor, a magnitude of optical flow image based on the video image and computing a histogram of optical flow magnitudes (HOFM) image for the video image based on the magnitude of optical flow image. Additionally, the method includes generating, by the processor, a mask indicating ROIs of the video image, based on the HOFM.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 24, 2022
    Inventors: Aishwarya Dubey, Hetul Sanghvi
  • Patent number: 11403859
    Abstract: A method for identifying regions of interest (ROIs) includes receiving, by a processor from a video camera, a video image and computing, by the processor, an optical flow image, based on the video image. The method also includes computing, by the processor, a magnitude of optical flow image based on the video image and computing a histogram of optical flow magnitudes (HOFM) image for the video image based on the magnitude of optical flow image. Additionally, the method includes generating, by the processor, a mask indicating ROIs of the video image, based on the HOFM.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: August 2, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Aishwarya Dubey, Hetul Sanghvi
  • Publication number: 20220174268
    Abstract: A method includes receiving, by a system-on-a-chip (SoC) from a camera mounted on a vehicle, a first image and transmitting, by the SoC to a display circuit over an interface cable, the first image. The method also includes receiving, by the SoC from the display circuit, a feedback signature corresponding to the first image. Additionally, the method includes detecting, by the SoC, an error, in response to determining that the feedback signature does not match the transmission-side signature and transmitting, by the SoC to the display circuit, a second image, in response to determining that the feedback signature matches the transmission-side signature.
    Type: Application
    Filed: February 17, 2022
    Publication date: June 2, 2022
    Inventors: Aishwarya Dubey, Peter Labaziewicz, Alan Rankin
  • Patent number: 11284062
    Abstract: A method includes receiving, by a system-on-a-chip (SoC) from a camera mounted on a vehicle, a first image and transmitting, by the SoC to a display circuit over an interface cable, the first image. The method also includes receiving, by the SoC from the display circuit, a feedback signature corresponding to the first image. Additionally, the method includes detecting, by the SoC, an error, in response to determining that the feedback signature does not match the transmission-side signature and transmitting, by the SoC to the display circuit, a second image, in response to determining that the feedback signature matches the transmission-side signature.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: March 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Aishwarya Dubey, Peter Labaziewicz, Alan Rankin
  • Publication number: 20220060740
    Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Inventors: Aishwarya DUBEY, Shashank DABRAL, Veeramanikandan RAJU
  • Publication number: 20210397864
    Abstract: A hardware accelerator for computing integral image values of an image is provided that includes a plurality of row computation components configurable to operate in parallel to compute row sum values of respective rows of a row block of the image. The hardware accelerator is further configured to compute integral image values for the row block using the row sum values and block pivots.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 23, 2021
    Inventor: Aishwarya Dubey
  • Patent number: 11172219
    Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: November 9, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Aishwarya Dubey, Shashank Dabral, Veeramanikandan Raju
  • Patent number: 11140364
    Abstract: Techniques including obtaining a first location of a vehicle, the vehicle having one or more cameras disposed about the vehicle, and wherein each camera is associated with a physical camera pose indicating where each camera is located with respect to the vehicle, capturing, by a first camera, a first image of a first area, associating the first image with the first location of the vehicle when the first image was captured, moving the vehicle in a direction so that the first area is no longer within a field of view of the first camera, obtaining a second location of the vehicle, determining a temporal camera pose based on the physical camera pose of the first camera and the second location of the vehicle, and rendering a view of the first area based on the temporal camera pose and the first image.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: October 5, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shashank Dabral, Aishwarya Dubey, Martin Fritz Mueller