Patents by Inventor Aiyu Ding

Aiyu Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11614667
    Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: March 28, 2023
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhenhong Xiao, Peng Liu, Chao Liang, Aiyu Ding, Yongqiang Zhang, Jingyi Xu, Hui Yuan, Jiantao Liu
  • Publication number: 20230043173
    Abstract: Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.
    Type: Application
    Filed: August 4, 2021
    Publication date: February 9, 2023
    Inventors: Peng Liu, Peirong Huo, Hong Liu, Chao Liang, Aiyu Ding, Zhenhong Xiao, Yongqiang Zhang, Yusheng Liu, Jingyi Xu, Jiantao Liu, Bo Li
  • Patent number: 11531241
    Abstract: A substrate in an array substrate includes a light aperture region and a winding region arranged around the light aperture region. On the substrate, an orthographic projection of a first winding in each first signal line is overlapped with an orthographic projection of a second winding in a corresponding second signal line. In this way, the distance between two adjacent signal lines in the winding region is larger, and the parasitic capacitance generated between them is smaller.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: December 20, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongqiang Zhang, Jingyi Xu, Hong Liu, Peng Liu, Peirong Huo, Aiyu Ding, Zhenhong Xiao, Bo Li, Bo Huang
  • Publication number: 20220187665
    Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.
    Type: Application
    Filed: September 24, 2021
    Publication date: June 16, 2022
    Inventors: Zhenhong XIAO, Peng LIU, Chao LIANG, Aiyu DING, Yongqiang ZHANG, Jingyi XU, Hui YUAN, Jiantao LIU
  • Publication number: 20220137471
    Abstract: A substrate in an array substrate includes a light aperture region and a winding region arranged around the light aperture region. On the substrate, an orthographic projection of a first winding in each first signal line is overlapped with an orthographic projection of a second winding in a corresponding second signal line. In this way, the distance between two adjacent signal lines in the winding region is larger, and the parasitic capacitance generated between them is smaller.
    Type: Application
    Filed: June 9, 2021
    Publication date: May 5, 2022
    Inventors: Yongqiang Zhang, Jingyi Xu, Hong Liu, Peng Liu, Peirong Huo, Aiyu Ding, Zhenhong Xiao, Bo Li, Bo Huang