Abstract: Embodiments include systems, apparatuses, and methods of three-dimensional plasma printing or processing. In one embodiment, a method includes introducing chemical precursors into one or more point plasma sources, generating plasma in the one or more point plasma sources from the chemical precursors with one or more power sources, and locally patterning a substrate disposed over a stage with the generated plasma by moving the stage with respect to the one or more point plasma sources.

Abstract: A method of removing a silicon-containing hard polymeric material from an opening leading to a recessed feature during the plasma etching of said recessed feature into a carbon-containing layer in a semiconductor substrate. The method comprises the intermittent use of a cleaning step within a continuous etching process, where at least one fluorine-containing cleaning agent species is added to already present etchant species of said continuous etching process for a limited time period, wherein the length of time of each cleaning step ranges from about 5% to about 100% of the time length of an etch step which either precedes or follows said cleaning step.

Abstract: A method and apparatus are provided for etching semiconductor and dielectric substrates through the use of plasmas based on mixtures of a first gas having the formula CaFb, and a second gas having the formula CxHyFz, wherein a/b??, and wherein x/z?½. The mixtures may be used in low or medium density plasmas sustained in a magnetically enhanced reactive ion chamber to provide a process that exhibits excellent corner layer selectivity, photo resist selectivity, under layer selectivity, and profile and bottom CD control. The percentages of the first and second gas may be varied during etching to provide a plasma that etches undoped oxide films or to provide an etch stop on such films.

Abstract: A high efficiency radio frequency (RF) impedance matching network containing an "L-type" inductor-capacitor (LC) circuit where the capacitor is a variable capacitor coupled from an input port to ground and the inductor is a variable inductance inductor coupled from the input port to an output port. A blocking capacitor is provided between the inductor and the output port and a ceramic capacitor is coupled in parallel across the variable capacitor. The impedance match is tuned by physically adjusting tuning elements of both the inductor and capacitor. The variable inductor contains an improved inductor tuning element that optimizes current flow in the tuning elements and inductor. To further improve the efficiency of the matching network, the assembly uses an improved enclosure interior finish and various circuit optimization techniques that reduce contributions to match loop resistance.