Patents by Inventor Akhilesh Rallabandi

Akhilesh Rallabandi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972303
    Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: April 30, 2024
    Assignee: Intel Corporation
    Inventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding, II
  • Patent number: 11948906
    Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: April 2, 2024
    Assignee: Intel Corporation
    Inventors: Feras Eid, Joe Walczyk, Weihua Tang, Akhilesh Rallabandi, Marco Aurelio Cartas Ayala
  • Publication number: 20230317556
    Abstract: A modification structure may be formed within a chassis of an electronic product to improve its thermal dissipation systems, to lessen its weight, and/or to enhance its durability, while maintaining the industrial design/esthetics/ergonomics thereof, wherein the modification structure may comprise a plurality of fused modification material particles. The modification structures may have a higher thermal conductivity than the chassis, may have a lower thermal conductivity than the chassis, may have a lower density than the chassis, and/or may have a higher yield strength than the chassis. In a specific example, the modification structure may extend entirely through the chassis and be sufficiently porous to allow air flow to assist in heat dissipation from the electronic product.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Applicant: Intel Corporation
    Inventors: Akhilesh Rallabandi, Feras Eid
  • Publication number: 20230266070
    Abstract: A heat dissipation device for an integrated circuit assembly may be fabricated to include at least one heat pipe that is at least partially embedded in a base plate that is formed with an additive manufacturing process, such as cold spraying. Embedding the at least one heat pipe in the base plate, rather than soldering the heat pipe to the base plate, eliminates the thermal bottleneck presented by the soldering material and reduces the overall height or thickness of the integrated circuit assembly.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 24, 2023
    Applicant: Intel Corporation
    Inventors: Feras Eid, Akhilesh Rallabandi
  • Publication number: 20220214730
    Abstract: Liquid cooling systems and coolers for electronic devices are disclosed herein. An example cooler includes a first thermal block having a first fluid passageway, a second thermal block having a second fluid passageway, and a thermoelectric cooler (TEC) coupled between the first thermal block and the second thermal block. The second thermal block is to be disposed on a processor of an electronic device such that the second thermal block is disposed between the TEC and the processor.
    Type: Application
    Filed: March 17, 2022
    Publication date: July 7, 2022
    Inventors: Arturo Navarro Alvarez, Jose Diaz Marin, Mark MacDonald, Akhilesh Rallabandi, Jose Salazar Delgado
  • Publication number: 20210329811
    Abstract: Sub-ambient cooling systems with condensation mitigation for use with electronic devices are disclosed. An example sub-ambient cooling assembly disclosed herein includes a heat spreader to remove heat from an electronic component. A thermal electric cooler that is to remove heat from the heat spreader. A heat exchanger to remove heat from the thermal electric cooler, where the thermal electric cooler is positioned between the heat spreader and the heat exchanger. A shroud is to at least partially surround the heat spreader and the thermal electric cooler, where the heat exchanger is to transfer heat to the shroud to increase a surface temperature of the shroud.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 21, 2021
    Inventors: Mark MacDonald, Akhilesh Rallabandi, Ellann Cohen, Michael Nakanishi, John Carver, Arturo Navarro Alvarez, Oleg Krishcko
  • Publication number: 20210249375
    Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 12, 2021
    Applicant: INTEL CORPORATION
    Inventors: Feras Eid, Joe Walczyk, Weihua Tang, Akhilesh Rallabandi, Marco Aurelio Cartas Ayala
  • Publication number: 20200326994
    Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Inventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding II