Patents by Inventor Akihiko Oka
Akihiko Oka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190380354Abstract: The present invention relates to a method of providing a processed marine product for refrigeration storage, the method being characterized by directly storing a refrigerated processed marine product in a container made of a plastic material having a transparency to allow the amount of the refrigerated processed marine product stored therein to be visually recognized from the outside, without packaging the product in a plastic bag or the like, and supplying the product to a consumer.Type: ApplicationFiled: March 27, 2017Publication date: December 19, 2019Inventors: Akihiko Oka, Futoshi Oi
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Patent number: 7020395Abstract: An optical transmission apparatus in which the reliability and quality of optical performance monitoring are improved. A light output unit selects and outputs light of one of a plurality of wavelengths. A digital information conversion unit converts a performance parameter for the light to digital information. A conversion map management unit manages a conversion map including a conversion format for converting the digital information indicative of values which vary according to the wavelengths of light with the same output power so that reference values at normal operation time for all the wavelengths will be the same and used for converting the digital information to a monitored value. A display control unit exercises control over the displaying of the monitored value corresponding to the digital information.Type: GrantFiled: February 24, 2003Date of Patent: March 28, 2006Assignee: Fujitsu LimitedInventors: Dai Hagimura, Akihiko Oka, Junichi Ishiwatari
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Patent number: 6657953Abstract: A signal loopback device including a multiplexing/demultiplexing unit to carry out multiplexing/demultiplexing between a DS3 signal serving as a digital signal conforming to a DS3 C-bit parity system and a DS1 signal, a DS1 signal loopback storage unit to return the DS1 signal, a DS3 signal loopback storage unit to return the DS3 signal in an original input signal format, a selecting unit to select any one of DS3 loopback signals from the multiplexing/demultiplexing unit and the DS3 signal loopback storage unit, a protected detecting unit to output, when detecting loopback execution/cancellation information a plurality of times, a result of detection showing that loopback is to be executed or canceled, and a loopback control unit to make a control for loopback execution or loopback cancellation to the DS1 signal loopback storage unit, the DS3 signal loopback storage unit, and the selecting unit depending upon the result of detection.Type: GrantFiled: March 31, 1998Date of Patent: December 2, 2003Assignee: Fujitsu LimitedInventors: Masanori Hiramoto, Hidetaka Kawahara, Keiichiro Tsukamoto, Akihiko Oka
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Publication number: 20030152384Abstract: An optical transmission apparatus in which the reliability and quality of optical performance monitoring are improved. A light output unit selects and outputs light of one of a plurality of wavelengths. A digital information conversion unit converts a performance parameter for the light to digital information. A conversion map management unit manages a conversion map including a conversion format for converting the digital information indicative of values which vary according to the wavelengths of light with the same output power so that reference values at normal operation time for all the wavelengths will be the same and used for converting the digital information to a monitored value. A display control unit exercises control over the displaying of the monitored value corresponding to the digital information.Type: ApplicationFiled: February 24, 2003Publication date: August 14, 2003Applicant: Fujitsu LimitedInventors: Dai Hagimura, Akihiko Oka, Junichi Ishiwatari
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Patent number: 6192437Abstract: A transmission apparatus includes a shelf which includes a working card slot and a protection card slot, the working card slot supplying a first slot ID to a first card inserted in the working card slot, and the protection card slot supplying a second slot ID to a second card inserted in the protection card slot. A control logic circuit, provided within each of the first and second cards, receives one of the first slot ID or the second slot ID, a redundancy/non-redundancy R/N signal and a working/protection W/P signal, and outputs a control signal depending on the related slot ID, the R/N signal and the W/P signal. A line connection relay, provided within each of the first and second cards, connects either a working line or a protection line to an output of the related card in accordance with the control signal supplied by the control logic circuit.Type: GrantFiled: August 16, 1999Date of Patent: February 20, 2001Assignee: Fujitsu LimitedInventors: Akihiko Oka, Keiichiro Tsukamoto
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Patent number: 6188701Abstract: Conventionally, since in an ADM apparatus being an interface apparatus between a DS3 network and a SONET network a DS3 frame is mapped into an STS1 frame, the multiplexing and demultiplexing of the STS1 frame has to be carried out in units of DS3 frames. For this reason, the DS3 frame is demultiplexed and converted to a DS2 frame, and then to a DS1 frame, the DS1 frame is multiplexed and converted to a VT1.5 frame, and this VT1.5 frame is mapped into an STS1 frame. Since the VT1.5 frame is synchronized with the STS1 frame, the multiplexing and demultiplexing processes can be carried out in smaller units of the VT1.5 frame. Accordingly, data can be distributed on smaller units on a network.Type: GrantFiled: March 11, 1998Date of Patent: February 13, 2001Assignee: Fujitsu LimitedInventors: Keiichiro Tsukamoto, Akihiko Oka
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Patent number: 5790520Abstract: A path protection switch ring system has a working line, a protection line, and a plurality of add/drop multiplexers. The add/drop multiplexer has a path-switch unit, an unequipped signal detection unit, and a path-switch control unit. The path-switch unit is used to switch between the working line and the protection line. The unequipped signal detection unit is used to detect an unequipped signal which is output when line setting has not been carried out. The path-switch control unit is used to control the switching operation of the path-switch unit when the unequipped signal is detected.Type: GrantFiled: October 29, 1996Date of Patent: August 4, 1998Assignee: Fujitsu LimitedInventors: Koji Iwamoto, Akihiko Oka
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Patent number: 5757774Abstract: A failure detector, connected to receive a signal from an interface at a lower level than the SONET level, detects a failure in that interface, such as a fiber cut or the loss of signals. An AIS generator is responsive to the detection of a failure by the failure detector to generate an AIS at the SONET level (STS and VT levels). A signal processing circuit converts a low-level signal from the interface to an SONET-level signal. When receiving the SONET-level AIS from the AIS generator, the signal processing circuit inserts it onto the SONET-level signal for application to SONET ADMs.Type: GrantFiled: October 17, 1994Date of Patent: May 26, 1998Assignee: Fujitsu LimitedInventor: Akihiko Oka
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Patent number: 5754545Abstract: An add-drop multiplexer contains a partial drop unit and a partial add unit. The partial drop unit selects a number n of first signal(s) of n channel(s) among a number N of first signals of N channels, which are received from a first transmission line, and transmits the n first signal(s) of n channel(s) on at least one second transmission line, where N and n are integers satisfying N>n>0. The partial add unit receives n second signal(s) of n channel(s) from at least one third transmission line, and a number (N-n) of first signal(s) of (N-n) channel(s) among the N first signals of the N channels, which are not selected by the partial drop unit, and transmits on the first transmission line the n second signal(s) of n channel(s) and the (N-n) first signal(s) of (N-n) channel(s) as N third signals of N channels.Type: GrantFiled: February 23, 1996Date of Patent: May 19, 1998Assignee: Fujitsu LimitedInventors: Masahiro Shinbashi, Akihiko Oka, Kazuo Takatsu, Hideaki Mochizuki, Junichi Ishiwatari, Koji Iwamoto
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Patent number: 5719747Abstract: An interface unit having a digital hierarchy interface function for a communication device has parts disposed on a printed-wiring board in a Layout to maintain desired interface unit characteristics. The interface unit includes a plurality of parallel B/U converter blocks for converting bipolar signals in a plurality of channels into a plurality of unipolar signals, respectively, a plurality of parallel U/B converter blocks for converting unipolar signals in a plurality of channels into a plurality of bipolar signals, respectively, a connector disposed near the B/U converter blocks for connecting the B/U converter blocks to an external device, a shared processor LSI circuit connected to the B/U converter blocks and the U/B converter blocks and disposed near the U/B converter blocks, for interfacing the signals in the channels at a low speed, and a printed-wiring board supporting the B/U converter blocks, the U/B converter blocks, the connector, and the shared processor LSI circuit.Type: GrantFiled: May 1, 1995Date of Patent: February 17, 1998Assignee: Fujitsu LimitedInventors: Kazuaki Kashiwada, Kenji Joukou, Akihiko Oka
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Patent number: 5640140Abstract: The alarm processing apparatus has fault detection means which detect faults with regard to specific individual items, and which are provided in constituent elements, which have redundancy; fixed fault detection means which determine the individual frequencies of occurrence of the faults detected by the fault detection means and which detect fixed faults related to the individual items, based on the relative magnitude of the frequencies with respect to the allowable maximum fault occurrence frequencies for those items; and selection means which by means of a system configuration command and at a timing which is delayed to longer than the response time of the fixed fault detection means, outputs an alarm for either the faults detected by the fault detection means in response to the system configuration command or the fixed faults detected by the fixed fault detection means.Type: GrantFiled: August 30, 1994Date of Patent: June 17, 1997Assignee: Fujitsu LimitedInventors: Akihiko Oka, Kanta Yamamoto
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Patent number: 5557437Abstract: An optical terminal system having self-monitoring function is disclosed, which includes a high-level group loopback section for internally looping back a serial electric signal, a low-level group loopback section for internally looping back a parallel electric signal, a self-loop section for connecting a receiver device and a transmitter device to loop an electric signal received by the receiver device directly to the transmitter device, and a self-monitoring controller for performing a self-monitoring test on respective components of the receiver device and transmitter device by using the self-loop section and either one of the high-level group loopback section and the low-level group loopback section. The optical terminal system can selfcheck the functions thereof through self-monitoring without depending on a network.Type: GrantFiled: June 7, 1995Date of Patent: September 17, 1996Assignee: Fujitsu LimitedInventors: Toshiharu Sakai, Yoshinori Nakamura, Takashi Umegaki, Nobuo Iguchi, Miki Hagino, Hiroaki Mori, Toshikazu Ota, Akihiko Oka, Kazuo Takatsu, Nobuyuki Nemoto
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Patent number: 5177758Abstract: A wavelength-tunable semiconductor laser device presenting a large wavelength-tunable range or a very-high-speed modulating semiconductor laser device having a distributed feedback structure including a diffraction grating as in the case of a DBR laser or a DFB laser incorporates therein a plurality of active layers differing from one another in constituent elements or composition ratio or thickness for reducing spectral line widths, while improving single-mode spectral oscillation characteristics.Type: GrantFiled: December 6, 1991Date of Patent: January 5, 1993Assignee: Hitachi, Ltd.Inventors: Akihiko Oka, Shinji Sakano, Naoki Chinone, Tsukuru Ohtoshi, Kazuhisa Uomi, Tomonobu Tsuchiya, Makoto Okai
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Patent number: 5173909Abstract: A wavelength tunable laser diode comprising a temperature variable heater separated from an active layer by a distance less than the thickness of a compound semiconductor substrate. Because the heater is located very close to the active layer, the response time of temperature change is improved. That in turn widens the tunable range of the laser diode.Type: GrantFiled: June 25, 1991Date of Patent: December 22, 1992Assignee: Hitachi, Ltd.Inventors: Shinji Sakano, Akihiko Oka, Katutoshi Saito, Naoki Chinone
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Patent number: 5119393Abstract: A wavelength-tunable semiconductor laser device presenting a large wavelength-tunable range or a very-high-speed modulating semiconductor laser device having a distributed feedback structure including a diffraction grating as in the case of a DBR laser or a DFB laser incorporates therein a plurality of active layers differing from one another in constituent elements or composition ratio or thickness for reducing spectral line widths, while improving single-mode spectral oscillation characteristics.Type: GrantFiled: June 13, 1990Date of Patent: June 2, 1992Assignee: Hitachi, Ltd.Inventors: Akihiko Oka, Shinji Sakano, Naoki Chinone, Tsukuru Ohtoshi, Kazuhisa Uomi, Tomonobu Tsuchiya, Makoto Okai