Abstract: A plant cultivation apparatus includes a lighting device configured to apply artificial light to plants, the lighting device being supported movably in a vertical direction and a height of the lighting device from the plants being adjustable, a projection part projecting from a lateral side of the lighting device, and a light reflector disposed outside the lateral side of the lighting device to reflect light from the lighting device back to the plants, the light reflector including a vertically extending slit that defines a movable range of the lighting device in the vertical direction in which the height of the lighting device from the plants is adjustable.

Abstract: A plant cultivation system includes a first floor including a first area having an area provided with a first plant cultivation shelf, an area provided with a second plant cultivation shelf, and an area between the first plant cultivation shelf and the second plant cultivation shelf, the first floor having no air vent holes; a second floor including a second area differing from the first area, the second floor having air vent holes; and an air-conditioning unit configured to circulate air from a ceiling having air supply holes to the air vent holes in the second floor.

Abstract: A hydroponic cultivation system for plants includes a first plant cultivation apparatus to hydroponically cultivate plants using a first liquid fertilizer, a first supply path to supply the first liquid fertilizer, a second plant cultivation apparatus to hydroponically cultivate plants using a second liquid fertilizer having a component differing from a component of the first liquid fertilizer, a second supply path to supply the second liquid fertilizer, and a tray carrier device to carry cultivation trays with the plants thereon between the first plant cultivation apparatus and the second plant cultivation apparatus. The cultivation trays are arranged in stages and mutually connected in series to the first supply path via a removable hose in the first plant cultivation apparatus, and the cultivation trays are arranged in stages and mutually connected in series to the second supply path via a removable hose in the second plant cultivation apparatus.

Abstract: A hydroponic cultivation system for plants includes a first plant cultivation apparatus to hydroponically cultivate plants using a first liquid fertilizer, a first supply path to supply the first liquid fertilizer, a second plant cultivation apparatus to hydroponically cultivate plants using a second liquid fertilizer having a component differing from a component of the first liquid fertilizer, a second supply path to supply the second liquid fertilizer, and a tray carrier device to carry cultivation trays with the plants thereon between the first plant cultivation apparatus and the second plant cultivation apparatus. The cultivation trays are arranged in stages and mutually connected in series to the first supply path via a removable hose in the first plant cultivation apparatus, and the cultivation trays are arranged in stages and mutually connected in series to the second supply path via a removable hose in the second plant cultivation apparatus.

Abstract: A plant cultivation system includes a first floor including a first area having an area provided with a first plant cultivation shelf, an area provided with a second plant cultivation shelf, and an area between the first plant cultivation shelf and the second plant cultivation shelf, the first floor having no air vent holes; a second floor including a second area differing from the first area, the second floor having air vent holes; and an air-conditioning unit configured to circulate air from a ceiling having air supply holes to the air vent holes in the second floor.

Abstract: A plant cultivation system includes a first floor including a first area having an area provided with a first plant cultivation shelf, an area provided with a second plant cultivation shelf, and an area between the first plant cultivation shelf and the second plant cultivation shelf, the first floor having no air vent holes; a second floor including a second area differing from the first area, the second floor having air vent holes; and an air-conditioning unit configured to circulate air from a ceiling having air supply holes to the air vent holes in the second floor.

Abstract: A plant cultivation system includes a first floor including a first area having an area provided with a first plant cultivation shelf, an area provided with a second plant cultivation shelf, and an area between the first plant cultivation shelf and the second plant cultivation shelf, the first floor having no air vent holes; a second floor including a second area differing from the first area, the second floor having air vent holes; and an air-conditioning unit configured to circulate air from a ceiling having air supply holes to the air vent holes in the second floor.

Abstract: A hydroponic cultivation system for plants includes a first plant cultivation apparatus to hydroponically cultivate plants using a first liquid fertilizer, a first supply path to supply the first liquid fertilizer, a second plant cultivation apparatus to hydroponically cultivate plants using a second liquid fertilizer having a component differing from a component of the first liquid fertilizer, a second supply path to supply the second liquid fertilizer, and a tray carrier device to carry cultivation trays with the plants thereon between the first plant cultivation apparatus and the second plant cultivation apparatus. The cultivation trays are arranged in stages and mutually connected in series to the first supply path via a removable hose in the first plant cultivation apparatus, and the cultivation trays are arranged in stages and mutually connected in series to the second supply path via a removable hose in the second plant cultivation apparatus.

Abstract: The present invention discloses a nonvolatile semiconductor memory device including a memory cell array composed of a plurality of memory cells, each of which is formed with a gate insulating film, a floating gate electrode, an insulating film between electrodes, and a control electrode formed respectively in a first conductor type semiconductor area, as well as a second conductor type source area and a second conductor type drain area formed respectively in the first conductor type semiconductor area, and programming and erasing data by controlling the amount of electrons in the floating gate electrode, wherein the nonvolatile semiconductor memory device further includes at least; means for applying a predetermined first operation voltage to the memory cell thereby to inject or eject electrons in or from the floating gate electrode; means for applying a second operation voltage to the memory cell after the application of the first operation voltage to give an electric field with a polarity opposite to that o

Abstract: It is possible to suppress or prevent so-called write disturbance phenomenon from occurring in write-disabled non-selected memory cells in a semiconductor device, in any selected one of which data can be written electrically by means of the so-called tunneling phenomenon. In a flash memory that can disable writing of data by suppressing injection of electrons in the accumulation layer of each non-selected memory cell in which data is to be written with a writing disable voltage applied to the drain thereof before a write voltage is applied to the control gate electrode of each selected memory cell, the relationship among a writing disable voltage Vwd, a read voltage Vr applied to the drain of a selected memory cell from which data is to be read, and a punch-through withstand voltage BVds between the source and the drain of each selected memory cell is set to satisfy Vr<BVds<Vwd.

Abstract: The present invention aims to provide high integration of a nonvolatile semiconductor memory device having lots of flash memory cells without causing a reduction in its operating speed. A width taken along a gate-width direction, of a lower conductor film for a floating gate electrode is made thinner than a minimum processing size F, and a width taken along the gate-width direction, of an upper conductor film for the floating gate electrode, which is provided with an insulating film disposed on source and drain regions interposed therebetween, is made thicker than the minimum processing size F, whereby a reduction in the ratio of coupling between a control gate electrode and a floating gate electrode due to the scaling down of a unit cell area is restrained.

Abstract: The present invention discloses a nonvolatile semiconductor memory device including a memory cell array composed of a plurality of memory cells, each of which is formed with a gate insulating film, a floating gate electrode, an insulating film between electrodes, and a control electrode formed respectively in a first conductor type semiconductor area, as well as a second conductor type source area and a second conductor type drain area formed respectively in the first conductor type semiconductor area, and programming and erasing data by controlling the amount of electrons in the floating gate electrode, wherein the nonvolatile semiconductor memory device further includes at least; means for applying a predetermined first operation voltage to the memory cell thereby to inject or eject electrons in or from the floating gate electrode; means for applying a second operation voltage to the memory cell after the application of the first operation voltage to give an electric field with a polarity opposite to that o

Abstract: The present invention discloses a nonvolatile semiconductor memory device including a memory cell array composed of a plurality of memory cells, each of which is formed with a gate insulating film, a floating gate electrode, an insulating film between electrodes, and a control electrode formed respectively in a first conductor type semiconductor area, as well as a second conductor type source area and a second conductor type drain area formed respectively in the firs conductor type semiconductor area, and programming and erasing data by controlling the amount of electrons in the floating gate electrode, wherein the nonvolatile semiconductor memory device further includes at least; means for applying a predetermined first operation voltage to the memory cell thereby to inject or eject electrons in or from the floating gate electrode; means for applying a second operation voltage to the memory cell after the application of the first operation voltage to give an electric field with a polarity opposite to that of

Abstract: The present invention aims to provide high integration of a nonvolatile semiconductor memory device having lots of flash memory cells without causing a reduction in its operating speed. A width taken along a gate-width direction, of a lower conductor film for a floating gate electrode is made thinner than a minimum processing size F, and a width taken along the gate-width direction, of an upper conductor film for the floating gate electrode, which is provided with an insulating film disposed on source and drain regions interposed therebetween, is made thicker than the minimum processing size F, whereby a reduction in the ratio of coupling between a control gate electrode and a floating gate electrode due to the scaling down of a unit cell area is restrained.

Abstract: To suppress or prevent the so-called write disturbance phenomenon from occurring in write-disabled non-selected memories in a semiconductor device provided with a plurality of memory cells, in any selected one of which data can be written electrically by means of the so-called tunneling phenomenon. In a flash memory that can disable writing of data by suppressing injection of electrons in the accumulation layer of each non-selected memory cell in which data is to be written with a writing disable voltage applied to the drain thereof before a write voltage is applied to the control gate electrode of each selected memory cell, the relationship among a writing disable voltage Vwd, a read voltage Vr applied to the drain of a selected memory cell from which data is to be read, and a punch-through withstand voltage BVds between the source and the drain of each selected memory cell is set so as to satisfy Vr<BVds<Vwd.

Abstract: A gate electrode of a field-effect transistor used as a peripheral circuit is constituted by the same gate electrode structure as a double-level gate electrode structure of nonvolatile memory cells, and a contact hole for connecting those conductive films constituting the gate electrode is provided at a location which two-dimensionally overlaps an active area within a plane of the gate electrode. A hole for connecting between the two layers of the gate electrode of a first field-effect transistor used as perpheral circuit is provided at a location which two-dimensionally overlaps the active area within the plane of the gate electrode, and a hole for connecting between the two layers of the gate electrode of a second field-effect transistor used as a peripheral circuit is provided at a location which two-dimensionally overlaps an isolation area within the plane of the gate electrode.

Abstract: A gate electrode of a field-effect transistor used as a peripheral circuit is constituted by the same gate electrode structure as a double-level gate electrode structure of nonvolatile memory cells. A hole for connecting the two layers of the gate electrode of a first field-effect transistor used as peripheral circuit is provided at a location which two-dimensionally overlaps the active area within the plane of the gate electrode, and a hole for connecting the two layers of the gate electrode of a second field-effect transistor used as a peripheral circuit is provided at a location which two-dimensionally overlaps an isolation area within the plane of the gate electrode. The gate length of the first field-effect transistor is longer than the gate length of the second field-effect transistor, and the gate width of the first field-effect transistor is wider than the gate width of the second field-effect transistor.

Abstract: A gate electrode of a field-effect transistor used as a peripheral circuit is constituted by the same gate electrode structure as a double-level gate electrode structure of nonvolatile memory cells, and a contact hole for connecting those conductive films constituting the gate electrode is provided at a location which two-dimensionally overlaps an active area within a plane of the gate electrode.

Abstract: A gate electrode of a field-effect transistor used as a peripheral circuit is constituted by the same gate electrode structure as a double-level gate electrode structure of nonvolatile memory cells, and a contact hole for connecting those conductive films constituting the gate electrode is provided at a location which two-dimensionally overlaps an active area within a plane of the gate electrode.

Abstract: The apparatus reads an original by an image reader, and if it recognizes caption(s) included in the original, stores a page number of the original into a memory, thereafter, performs copying based on the stored page number such that the original page including the caption is transferred onto the front side of a recording sheet.