Abstract: In a semiconductor device that generates a power supply voltage from an RF carrier signal received by an antenna through the use of a rectification circuit, rectification circuits, each including a plurality of capacitors and a plurality of diodes, are connected in multistage. The rectification circuits includes limiter circuits that are turned on at a voltage larger than an on-voltage of the diodes, clamp cathodes of the diodes at a first voltage. The limiter circuits and the diodes are connected in parallel between the capacitors connected to the antenna connection terminal and a node supplied reference potential VSS of the power supply voltage.

Abstract: In a semiconductor device that generates a power supply voltage from an RF carrier signal received by an antenna through the use of a rectification circuit, rectification circuits, each including a plurality of capacitors and a plurality of diodes, are connected in multistage. The rectification circuits includes limiter circuits that are turned on at a voltage larger than an on-voltage of the diodes, clamp cathodes of the diodes at a first voltage. The limiter circuits and the diodes are connected in parallel between the capacitors connected to the antenna connection terminal and a node supplied reference potential VSS of the power supply voltage.

Abstract: A receiver apparatus includes a band-pass filter having a variable frequency band coupled to a node for receiving a received signal including a plurality of channels to output at an output node thereof a limited-band signal made by limiting a frequency band of the received signal to a frequency band of a desired channel, a frequency conversion unit coupled to the output node of the band-pass filter to output at an output node thereof an intermediate frequency signal made by converting frequencies of the limited-band signal, and a control unit configured to adjust an intermediate frequency of the intermediate frequency signal by controlling the frequency conversion unit in response to at least one of a signal speed and a channel frequency interval of the received signal.

Abstract: An arranging facility, a parking facility, a handling facility, and a ventilation device. A vehicle maintenance facility as the arranging facility comprises a vehicle maintenance booth as an arranging space and a forcible air supply/discharge mechanism. The vehicle maintenance booth is surrounded by side walls and a ceiling wall as partition walls on its periphery. A maintenance vehicle on which a fuel battery as an energy converter is mounted is temporarily disposed in the vehicle maintenance booth. Also, the air supply/discharge mechanism comprises an air intake device feeding air to the vehicle maintenance booth and an air discharge device discharging the air from the vehicle maintenance booth to dilute hydrogen gas leaking from a vehicle under maintenance.

Abstract: A receiver apparatus includes a band-pass filter having a variable frequency band coupled to a node for receiving a received signal including a plurality of channels to output at an output node thereof a limited-band signal made by limiting a frequency band of the received signal to a frequency band of a desired channel, a frequency conversion unit coupled to the output node of the band-pass filter to output at an output node thereof an intermediate frequency signal made by converting frequencies of the limited-band signal, and a control unit configured to adjust an intermediate frequency of the intermediate frequency signal by controlling the frequency conversion unit in response to at least one of a signal speed and a channel frequency interval of the received signal.

Abstract: A component mounting structure including a metal base; a first substrate bonded to the upper surface of the metal base; a first wiring pattern formed on the upper surface of the first substrate; a second substrate horizontally mounted on the upper surface of the first substrate so that the lower surface of the second substrate is in contact with the upper surface of the first substrate; a second wiring pattern formed on the second substrate so as to be connected to the first wiring pattern; and a component mounted on the second substrate so as to be connected to the second wiring pattern.

Abstract: An optical communication system transmits an optical signal from an optical sender to an optical receiver. A superimposed signal corresponding to a transmission speed of the optical signal is superimposed on the optical signal. At the optical receiver which receives the transmission light, the transmission speed is detected based on the superimposed signal included in the received light, and setting of a phase-lock loop circuit for extracting a clock signal is switched, to thereby perform a data decision processing of the received light. Thus, it becomes possible to receive and process optical signals at different transmission speeds by a single optical receiver, even when optical signals at the different transmission speeds are transmitted between the optical sender and the optical receiver.

Abstract: In the optical communication system of the present invention, transmitted from an optical sender to an optical receiver is an optical signal placed with a superimposed signal corresponding to a transmission speed of the optical signal. At the optical receiver having received the transmission light, the transmission speed is detected based on the superimposed signal included in the received light, and such as an operation setting of a phase-lock loop circuit for extracting a clock signal is switched, to thereby perform a data decision processing of the received light. Thus, it becomes possible to receive and process optical signals at different transmission speeds by a single optical receiver, even when optical signals at the different transmission speeds are transmitted between the optical sender and optical receiver.

Abstract: Disclosed is a clock extraction circuit for extracting a clock signal which furnishes timing for discriminating a data signal, from the data signal. The clock extraction circuit has a timing extraction unit for extracting the clock signal from the data signal, and a filter, which is provided in front of the timing extraction unit, having an upper limited frequency sufficiently lower than the bit rate of the data. The data signal is input to the timing extraction unit via the filter.

Abstract: A clock signal detection circuit includes a diode to which a clock signal is applied as an input. If a voltage VD IN on the anode side of the diode is greater than a voltage VD OUT on the cathode side, the clock signal is fed into a transmission line and arrives at a reflecting load upon elapse of a prescribed delay time. When the voltage VD IN on the anode side of the diode becomes smaller than the voltage VD OUT on the cathode side, the clock signal is reflected by the reflecting load and returns to the cathode of the diode through the transmission line. This introduction and reflection of the clock signal is repeated at the clock signal period so that the amplitude on the output side of the diode is enlarged, thereby making it possible to obtain, from an averaging circuit, a clock detection voltage substantially equal to the amplitude value of the clock signal.

Abstract: An optical amplifier is disclosed, which comprises an optical amplifying unit for amplifying an optical signal, a light output monitoring unit for monitoring the light output of the optical amplifying unit, a control unit for controlling the optical amplifying unit by comparing the light output of the optical amplifying unit monitored by the light output monitoring unit with a specified reference value so as to cause the light output of the optical amplifying unit to take a predetermined output value and an input light level detecting unit for detecting the input light level of the optical signal. The control unit controls the light output level of the optical amplifying unit by changing the reference value used for comparison according to the input light level detected by the input light level detecting unit.

Abstract: A drive circuit for an optical modulator having first and second electrodes for receiving a drive voltage. The optical modulator modulates carrier light from a light source according to the drive voltage to output modulated signal light. A terminating resistor for generating the drive voltage is connected between the first and second electrodes. A first end of a transmission line is connected to one of the first and second electrodes. A circuit for generating a drive signal is connected to a second end of the transmission line. A reflection rejecter (e.g., attenuator) for suppressing a reflected wave generating in the transmission line is provided on the transmission line. This drive circuit improves the waveform of the modulated signal light in case that the carrier light has large power.

Abstract: A supervisory and control signal transmitting system for use in an optically amplifying repeater system amplifies attenuated light and for transmitting data over a long distance between a transmitting station and a receiving station through a plurality of repeaters.

Abstract: A paint apparatus includes a framework having a beam, a carriage constrained to move reciprocally along the beam, a first robot mounted to the carriage and movable relative to the carriage except in a direction parallel to the beam, and a second robot mounted to the carriage and movable relative to the carriage except in the direction parallel to the beam. The first and second robots and are spaced from each other in the direction parallel to the beam and in a direction perpendicular to the beam. As a result, interference between the first and second robots and is prevented and paint sprayed onto each other is prevented.

Abstract: A system is disclosed for painting components of an automobile more efficiently and more economically. To achieve the efficient production of painted components, the painting system includes parallel input and output main transfer lines and a plurality of sub transfer lines which are located perpendicular to and between the parallel input and output main transfer lines.A plurality of input intersections are formed between the input main transfer line and the sub transfer lines, and a plurality of output intersections are formed between the output main transfer line and the sub transfer lines. Each sub transfer line includes a turntable within a painting booth which is located at a central portion of each sub transfer line and a painting device is located at the side of each turntable.Further, each sub transfer line includes at least an input side waiting position and at least an output side waiting position.