Abstract: In a direct sequence/code division multiple access (DS/CDMA) type interference canceller receiving apparatus having a delaying unit for delaying a reception signal into zeroth through (N−1)-th delayed signals, zeroth through (N−1)-th path receivers for demodulating the zeroth thorough the (N−1)-th delayed signals into zeroth through (N−1)-th demodulated signals, and a combining unit for combining the zeroth through the (N−1)-th demodulated signals into a combined signal, an n-th path receivers includes an n-th follow-up path detection unit for detecting an n-th follow-up path for the n-th path receiver on the basis of a peculiar spread code in response to an n-th coefficient control signal. The n-th follow-up path detection unit produces n-th follow-up path information indicative of the n-th follow-up path.

Abstract: In a CDMA receiver, signals from a number of correlatively spaced apart antennas are respectively multiplied by weight coefficients and summed together to produce a weighted sum signal, which is separated into multipath components of a transmitted signal. The multipath components are despread with a chip sequence, producing despread signals at symbol intervals. Demodulators estimate channel responses of propagation paths from the despread signals and multiply the despread signals by the estimated channel responses to produce demodulated signals, which are summed and a threshold decision is made on the sum of the demodulated signals to produce a decision output. Error detection circuitry multiplies the decision output by the estimated channel responses to produce a number of multiplied decision outputs, and detects differences between the multiplied decision outputs and the despread signals to produce a number of error signals, which are combined together.

Abstract: In a multiuser receiver for use in a Code Division Multiple Access (CDMA) system to produce first through N-th demodulated signals for N-th users in response to an input signal where N is an integer not smaller than unity, the receiver has first through M-th stages, where M is an integer not smaller than unity. In each stage, first through N-th interference cancellation units are included to form the first through the N-th users. Each interference cancellation unit is supplied with a cancellation error signal obtained from a previous interference cancellation to produce an interference replica signal and a spread signal concerned with a difference between the interference replica signal and a previous interference replica signal. An n-th interference replica signal is successively sent to an n-th user of the following stages to be demodulated Into an n-th demodulated signal which is received by an n-th user where n is an integer between 1 and N, both inclusive.

Abstract: A transmission side generates a first frame comprising a field for storing error correction coded information and a field for storing identification information representing error correction coded information, and generates a second frame comprising a field for storing non error correction coded information, a field for storing identification information representing non error correction coded information and a field for storing an error-detecting bit. A reception side detects whether or not a received frame has an error based on bit contents of the field storing the error-detecting bit of the received frame. If the received frame has an error, a frame type is detected based on the identification information. If the detected frame type is the first type the received frame is output to a process stage. If the detected frame type is the second type the received frame is abandoned.

Abstract: A code-orthogonalizing filter 101 performs inverse spread using an orthogonalizing coefficient, which is obtained through a constraint condition process on a code multiplexed received signal as an input with a desired spread code waveform and independent on transmission line variations, thus detecting a desired wave at a constant power level while suppressing interference waves. A carrier tracking circuit 102 effects carrier phase synchronization of the detected desired wave. A symbol decision unit 104 decides the output of the carrier tracking circuit 102 to be the most certain symbol. An adder 104 extracts as symbol decision error signal from the outputs of the symbol decision unit 103 and the carrier tracking circuit 102.

Abstract: An FDD/CDMA transmission/reception system includes a CDMA transmitter and a CDMA receiver. The CDMA transmitter includes a plurality of transmission antennas, signal transmission units for transmitting transmission signals weighted by different values to the respective transmission antennas, and pilot signal transmission units for transmitting a plurality of different pilot signals to the respective transmission antennas. The CDMA receiver includes a reception unit for obtaining one received signal from the transmission signals from the plurality of transmission antennas of the CDMA transmitter in consideration of reception quality, and a unit for transmitting antenna control signals corresponding to reception power values of the received pilot signals to the CDMA transmitter.

Abstract: There is provided a CDMA communication system in which the number of multiple users can be greatly increased under fast fading circumstances. In a transmitting apparatus, an M-ary digital modulator modulates the m-bit (m.gtoreq.2 and m is an integer) binary digital signal into M-value symbols (M=2.sup.m) prior to the spreading operation by multipliers. In a receiving apparatus, after the despreading operation by an orthogonalizing filter, an M-ary digital demodulator compensates the variation of the phase and amplitude of the carrier of the M-ary modulated signal during the transmission. A decision circuit decides the output of the M-ary digital demodulator. A tap coefficient control circuit calculates orthogonalizing coefficients using the outputs of the subtractors, the outputs of the M-ary digital demodulator, the outputs of receiving filters, and the spreading code.

Abstract: In a diversity receiver provided with diversity branches (51 and 52) which have a predetermined distance therebetween and each of which produces a received signal sequence in response to reception of a radio signal directed to the diversity receiver with a symbol rate, each of samplers (56 and 57) samples the received signal sequence with plural times of the symbol rate to produce a sampled serial signal sequence. Each of serial-to-conversion circuits (58 and 59) converts the sampled serial signal sequence into parallel signals. With reference to the parallel signals, channel impulse response estimation circuits (61 and 62, or 63 and 64) estimate channel impulse responses, respectively. In accordance with each of the estimated impulse response signals and each of the parallel signals, branch metric calculation circuits (66, 67, 68, and 69) calculate branch metrics. A branch metric combining circuit (71) combines the branch metrics into a combined branch metric.

Abstract: In a DS/CDMA receiver, each of first and second receiving units (211 and 221) receives a DS/CDMA signal as a received signal. First and second adaptive interference cancellers (212+213, 222+223) are connected to the first and the second receiving units, respectively. Each of the adaptive interference cancellers cancels an interference on the received signal. Connected to the first and the second receiving units and to the first and the second adaptive interference cancellers, a single interference canceller control circuit (204) controls the first and the second adaptive interference cancellers in common. An all output combiner (201) combines all of output signals of the first and the second adaptive interference cancellers. Preferably, each of the adaptive interference cancellers has an adaptive filter (212 or 222) to cancel the interference with respect to all other stations by adaptively making its tap coefficients orthogonal to spreading codes of the all other stations.

Abstract: A receiver is disclosed for a DS/CDMA communication system wherein a symbol is spread with a predetermined spread code to produce a DS/CDMA signal which is transmitted on a radio frequency carrier. The receiver includes an interference canceller for cancelling signals from undesired sources introduced to a signal received from a desired source using a feedback signal. A phase variation canceller is provided for cancelling a phase variation that occurs in an interval between successive symbols of the received signal. Both cancellers are connected in series. A decision circuit compares an input signal from the interference canceller or from the phase variation canceller with a threshold and produces an output representing one of two discrete values depending on whether it is higher or lower than the threshold. A correction circuit derives a correction signal from a signal produced by the interference canceller and applies it to the interference canceller as the feedback signal.

Abstract: A maximum-likelihood sequence estimator (MLSE) with a variable number of states. A channel response estimator calculates channel responses from a received signal having a predetermined burst length and a reference signal. A controller checks the latest (L-th) response having a larger power than a predetermined threshold value of the channel responses and determines the L number of effective channel responses having the larger power. A Viterbi equalizer with a variable number of states executes a maximum-likelihood sequence estimation on the basis of the trellis with M.sup.(L-1) states (M is a multi-value number of a modulation signal) using the L number of effective channel responses. The MLSE is operated with the minimum number of states every burst to reduce an average processing amount without degrading characteristics and to achieve a low consumption power of receivers.

Abstract: A receive condition in burst transmission varies in units of a burst or a plurality of symbol times. The present invention provides a soft decision signal outputting receiver which can simply produce correct reliability information even if the receive condition varies while employing a simple reliability information production method. A demodulator demodulates a burst signal to obtain a hard decision signal. A time-varying reliability information production circuit receives information of a demodulation process from the demodulator 11 and produces reliability information regarding the hard decision signal. The time-varying reliability information production circuit receives signal quality information which reflects a receive condition for each burst or each plurality of symbol times, and changes, based on the signal quality information, a production method for reliability information or elements such as threshold levels to be used in a production method for each burst or each plurality of symbol times.

Abstract: In a signal reception system comprising an adaptive filter having a plurality of filter coefficients and producing a filtered signal, a differential detection circuit for carrying out differential detection operation by the use of a delayed signal wherein the filtered signal is delayed, and an error signal generation circuit for generating an error signal, the adaptive filter adjusts the plurality of filter coefficients in accordance with the error signal. An error signal control circuit has a threshold value and supplies the error signal to the adaptive filter only when the delayed signal has a signal value which is higher than the threshold value.

Abstract: An adaptive equalizer estimates a channel impulse response h in a channel impulse response estimator and outputs a result to a channel impulse response convertor. The channel impulse response convertor removes interference components from the channel impulse response h, outputs a channel impulse response h' to an equalizer. The equalizer sets up, based on the channel impulse response vector h', internal parameters, and equalizes, based on the internal parameters, reception signals. By configuring as above, distortion by intersymbol interference and a deterioration of reception performance by co-channel interference waves can be prevented.

Abstract: In a digital data demodulating apparatus, a sampling circuit samples a received signal at a speed N.times.K (N>1, K>1; integers) times a symbol rate to output received signal sequences. N received signal sequence selection circuits estimate channel impulse responses from the respective received signal sequences to obtain channel state data, and output a control pulse and the estimated channel impulse response values. A received signal sequence selection controller outputs a switch control signal on the basis of the channel state data. N selectors select demodulation received signal sequence candidates from the received signal sequences on the basis of the control pulse. A first switch selects/outputs a received signal sequence to be demodulated on the basis of the switch control signal. A second switch selects/outputs an estimated channel impulse response value estimated from the received signal sequence to be demodulated on the basis of the switch control pulse.

Abstract: A method and apparatus of estimating a data sequence transmitted using a Viterbi algorithm, are disclosed. Sampled values of incoming data are acquired at a predetermined time interval into a memory. Subsequently, a plurality of sampled values are retrieved from the memory. Further, a plurality of receive signal replicas, which have been previously prepared and stored in another memory, are retrieved. A plurality of receive signal replicas are determined by multiplying the sampled values by the receive signal replica coefficients. Branch metrics are then determined using the sampled values of the incoming data and the receive signal replicas. A data sequence is estimated using the branch metrics according to the Viterbi algorithm.

Abstract: On selecting as a selected channel at a base station in response to a channel assignment request one of transmission channels of a cellular mobile radio communication network when this channel is given a higher updated priority degree in accordance with an interference signal power received through this channel while such requests are not present and furthermore when a CIR of this channel is above a preselected CIR threshold level, the CIR threshold level is selected in dependency on the updated priority degrees given to the transmission channels. Preferably, the CIR threshold level is low and high if the updated priority degree of each channel is high and low at the base station, respectively.

Abstract: A maximum likelihood sequence estimation apparatus decodes a digital data signal. The apparatus includes: a sampling device to perform sampling and to output a received signal by sampling pulses having a constant time interval T and N different sampling phases; an operation device to operate a branch metric of the received signal sampled by the N different sampling phases; and a device to perform maximum likelihood sequence estimation of the branch metric.

Abstract: A receiver for digital radio communications has an equalizer which is powered off for reduced power consumption when received radio waves undergo relatively small intersymbol interference. When intersymbol interference is significantly large, the equalizer is powered on to remove the intersymbol interference for better signal reception. The receiver has a signal quality decision circuit which powers on the equalizer when the quality of the received signal is poor, and powers off the equalizer when the quality of the received signal is good. The receiver consumes a relatively small amount of electric power overall.

Abstract: To reduce the number of operations required for estimating a transmitted data sequence using a Viterbi algorithm, a method and apparatus are provided for (a) storing a plurality of sampled values of an incoming signal in a shift register in a predetermined interval; (b) receiving a plurality of the sampled values from the shift register, and estimating channel responses, at a current time point, of a plurality of first signal sequences which are derived from the plurality of sampled values and each of the length of which is reduced by deleting at least one sampled data at the oldest time point; (c) receiving the channel responses estimated at (b) and checking to see if each of the estimated channel responses is determinate, producing a first signal sequence if an estimated channel response of a first signal sequence is found determinate, and producing an estimated channel response as a first signal sequence at a time point preceding the current time point in the event that the estimated channel response of th