Patents by Inventor Akihito Nagamatsu

Akihito Nagamatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High frequency mixer circuit
    Publication number: 20060177077
    Abstract: A high frequency mixer circuit is used as a down converter in which an RF signal and an LO signal are mixed to generate an IF signal, or as an up converter in which an IF signal and an LO signal are mixed to generate an RF signal. The high frequency mixer circuit has a wiring layout wherein wiring lines for propagating LO signals intersect only one of the wiring lines for propagating RF signals or IF signals.
    Type: Application
    Filed: February 9, 2006
    Publication date: August 10, 2006
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuyuki Okada, Akihito Nagamatsu, Katsuaki Onoda, Shigehiro Nakamura, Mikito Sakakibara
  • Method of doping, semiconductor device, and method of fabricating semiconductor device
    Patent number: 5557141
    Abstract: A group III-V compound semiconductor doped with an impurity, having an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed on a crystal of Group III-V compound semiconductor in which the silicon in the SiOx film is diffused into the Group III-V compound semiconductor, thereby forming a doped layer.
    Type: Grant
    Filed: March 30, 1994
    Date of Patent: September 17, 1996
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasoo Harada, Shigeharu Matsushita, Satoshi Terada, Emi Fujii, Takashi Kurose, Takayoshi Higashino, Takashi Yamada, Akihito Nagamatsu, Daijirou Inoue, Kouji Matsumura
  • Method of doping a group III-V compound semiconductor
    Patent number: 5350709
    Abstract: A method of doping a Group III-V compound semiconductor with an impurity, wherein after an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed in this order on a crystal of Group III-V compound semiconductor, the sample is subjected to at least one heat treatment to cause silicon in the SiOx film to diffuse into the Group III-V compound semiconductor, thereby forming a doped layer. Using this doped layer forming method, field-effect transistors, diodes, resistive layers, two-dimensional electron gas or one-dimensional quantum wires, zero-dimensional quantum boxes, electron wave interference devices, etc. are fabricated.
    Type: Grant
    Filed: June 10, 1993
    Date of Patent: September 27, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasoo Harada, Shigeharu Matsushita, Satoshi Terada, Emi Fujii, Takashi Kurose, Takayoshi Higashino, Takashi Yamada, Akihito Nagamatsu, Daijirou Inoue, Kouji Matsumura
  • Method of fabricating MMIC semiconductor integrated circuits using the RF and DC measurements of an active device on a substrate to design the passive elements, which are then E-beam written to the substrate
    Patent number: 5051373
    Abstract: An active device such as an HEMT is formed on a GaAs substrate, and characteristics of this active device formed are measured. A circuit pattern of a passive circuit device including a serial microstrip line is simulated on the basis of the results of this measurement, and a circuit pattern obtained by the simulation is directly drawn on a substrate to form the passive circuit device, thereby to fabricate an MMIC. Accordingly, the passive circuit device is formed in conformity with the characteristics of the active device for each chip.As a result, the variation in characteristics of the active device is canceled, to obtain an MMIC superior in matching.
    Type: Grant
    Filed: January 5, 1990
    Date of Patent: September 24, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takashi Yamada, Akihito Nagamatsu, Seiichi Bamba, Tetsuro Sawai, Haruo Nakano, Kimihiko Nagami