Abstract: A memory system includes semiconductor memory devices and a control device. Each of the semiconductor memory devices includes a first pad to which a first signal is input, a second pad to which a second signal is input, a third pad to which a third signal is input, a memory cell array, a sense amplifier, and a data register. In a first mode, after the first signal is switched, a command set instructing a data out operation is input via the second pad. In a second mode, after the first signal is switched, the command is input via at least the third pad. The control device executes a first operation assigning different addresses to the respective semiconductor memory devices and a second operation causing the modes of the respective semiconductor memory devices to be switched from the first to the second mode.

Abstract: A current mirror type D/A converter circuit is constructed with transistor cells each including a MOS transistor, a gate region of which MOS transistor has folded stripe configuration in a plan view thereof, or a current flowing direction in a channel of which is a folded stripe in plan view.

Abstract: A D/A converter circuit includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit has a plurality of output side transistors provided correspondingly to digits of data to be converted and generates en analog current by obtaining, in at least one of the output side transistors, a current corresponding to the weight of the digit of the data being converted. The second current mirror circuit is connected on an upstream or downstream side of the output side transistors and corresponding to a lower digit of the data. An analog current is generated with the second current mirror circuit by obtaining a current corresponding to a weight of a digit that is less than 1.

Abstract: The output current from respective output terminals of a drive circuit (driver IC) of an organic EL display panel to respective column pins or data lines is sequentially selected by sequentially scanning a plurality of switch circuits by a switch scan circuit. The resultant output currents are converted into voltage values by resistors selected by a selector. Further, the converted voltage values sequentially generated according to the scanning of the switch scan circuit are outputted externally of the IC.

Abstract: An information recording apparatus has a write canceling circuit that monitors interface signals fed from a host and that, when the interface signals are recognized to be abnormal, inhibits write operation against a recording medium either for a predetermined period or until a predetermined condition is fulfilled. This circuit configuration helps eliminate or reduce the occurrence of erroneous write operation as occurs when the received interface signals are abnormal.

Abstract: A transistor for detecting current generated by an output side transistor of a current mirror circuit of an organic EL panel drive circuit and a control circuit including a current driven input stage and an output stage for driving the input side transistor of the current mirror circuit are provided. The input stage of the control circuit receives the detected current and a certain reference current and the output stage of the control circuit generates a drive current, which corresponds to a difference between the detected current and the certain reference current and drives the input side transistor of the current mirror circuit. The control circuit controls the detected current in such a manner that it becomes equal to the reference current and the current distributed to terminal pins of an organic EL panel becomes the reference current or a current corresponding thereto.

Abstract: An organic EL drive circuit comprises a timing signal generator circuit for generating a plurality of second timing control signals sequentially delayed from a first timing control signal, a reset pulse generator circuit for selecting one of the plurality of the second timing control signals according to the predetermined data and generating a reset pulse having a front edge determined according to the selected second timing control signal and a rear edge determined by the first timing control signal and a switch circuit responsive to the reset pulse for connecting the terminal pins to a predetermined bias line to reset an organic EL element of an organic EL panel connected to the terminal pins. Luminance of the organic EL panel is regulated by regulating the display period according to the predetermined data.

Abstract: [Problem] To provide a high precision D/A converter circuit capable of being driven with low voltage and restricting an area taken thereby when it is formed as an IC.

Abstract: [Problem]To provide a drive circuit (driver IC) of an organic EL display panel and an organic EL display device, which is capable of shortening a test time when a test on appropriateness of current values outputted to respective column pins of the drive circuit. [Means for Solving the Problem]Output currents outputted from respective output terminals of a drive circuit (driver IC) of an organic EL display panel to respective column pins or data lines are sequentially selected by sequentially scanning a plurality of switch circuits by a switch scan circuit, the output currents are converted into voltage values by resistors selected by a selector and the converted voltage values sequentially generated according to the scanning of the switch scan circuit are outputted externally of the IC.

Abstract: [Problem]To provide an organic EL drive circuit and an organic EL display device, capable of restricting an area taken by gamma correction circuits provided correspondingly to terminal pins. [Means for Solving the Problem]An organic EL drive circuit includes switch circuits for connecting the terminal pins to a predetermined potential line according to a reset pulse, a correction data generator circuit for generating correction data for correcting a light emitting period of the organic EL element according to display data for gamma correction of luminance of the organic EL element and a reset pulse generator circuit for generating the reset pulse having pulse width corresponding to the gamma correction according to the first timing control signal and the correction data.

Abstract: First analog currents are obtained through a plurality of switch circuits provided correspondingly to output pins of an organic EL drive circuit as drive currents or through output stage current sources. The first analog currents or the drive currents are compared by a comparator provided within the organic EL element drive circuit with a second analog current (reference current) or a current obtained by passing the second analog current through a current source corresponding to the output stage current source. A result of comparison is outputted externally of the organic EL element drive circuit. The drive currents are obtained sequentially at the output pins by turning the switch circuits ON one by one sequentially by a control circuit to sequentially obtain the result of comparison for the drive currents from the organic EL element drive circuit.

Abstract: A disk controller IC (11), driven by a first supply voltage (V1), is provided with a push-pull type output circuit having an output terminal (P1). The output circuit may be turned ON/OFF by a control signal. On the other hand, disk driver IC (12) is provided with a first voltage and a series of a pull-up resistor (R1) and a diode (D3) connected in series between an input terminal and the first supply voltage. An interface is established for the ICs (11, 12) by connecting the output terminal (P1) and the input terminal (P2) together.

Abstract: An information recording apparatus has a write canceling circuit that monitors interface signals fed from a host and that, when the interface signals are recognized to be abnormal, inhibits write operation against a recording medium either for a predetermined period or until a predetermined condition is fulfilled. This circuit configuration helps eliminate or reduce the occurrence of erroneous write operation as occurs when the received interface signals are abnormal.

Abstract: An information recording apparatus has a write canceling circuit that monitors interface signals fed from a host and that, when the interface signals are recognized to be abnormal, inhibits write operation against a recording medium either for a predetermined period or until a predetermined condition is fulfilled. This circuit configuration helps eliminate or reduce the occurrence of erroneous write operation as occurs when the received interface signals are abnormal.

Abstract: A disk controller IC (11), driven by a first supply voltage (V1), is provided with a push-pull type output circuit having an output terminal (P1). The output circuit may be turned ON/OFF by a control signal. On the other hand, disk driver IC (12) is provided with a first voltage and a series of a pull-up resistor (R1) and a diode (D3) connected in series between an input terminal and the first supply voltage. An interface is established for the ICs (11, 12) by connecting the output terminal (P1) and the input terminal (P2) together.

Abstract: An information recording apparatus has a write canceling circuit that monitors interface signals fed from a host and that, when the interface signals are recognized to be abnormal, inhibits write operation against a recording medium either for a predetermined period or until a predetermined condition is fulfilled. This circuit configuration helps eliminate or reduce the occurrence of erroneous write operation as occurs when the received interface signals are abnormal.

Abstract: Dummy circuits, which are not operated, are provided in transistor blocks, which are positioned in outermost side portions of a drive circuit forming area of an IC. Physical property-related stress of unit transistors constituting D/A converter circuits or the D/A converter circuits and output stage current sources, which are formed in the transistor block in an area between the outermost transistor blocks, are relatively even, so that current mirror circuits constituting the D/A converter circuits can be constructed with unit transistors having good pairing characteristics.

Abstract: Determination means determines for every column pin whether or not display data of a current horizontal scan period (display time period) is the same as that of a next horizontal scan line (display time period). When the display data for one horizontal line are identical, an anode of an OEL element is connected to this terminal pin and then the drive current of the OEL element having a cathode to be scanned next in the vertical direction becomes substantially the same. Then, when a next vertical line is scanned for the column pin having display data, which is determined as identical, the resetting of the OEL element is inhibited by the reset inhibit circuit and the generation of peak current in a next horizontal scan period (display time period D) is stopped.

Abstract: A current mirror type D/A converter circuit is constructed with transistor cells each including a MOS transistor, a gate region of which MOS transistor has folded stripe configuration in a plan view thereof, or a current flowing direction in a channel of which is a folded stripe in plan view.

Abstract: A transistor for detecting current generated by an output side transistor of a current mirror circuit of an organic EL panel drive circuit and a control circuit including a current driven input stage and an output stage for driving the input side transistor of the current mirror circuit are provided. The input stage of the control circuit receives the detected current and a certain reference current and the output stage of the control circuit generates a drive current, which corresponds to a difference between the detected current and the certain reference current and drives the input side transistor of the current mirror circuit. The control circuit controls the detected current in such a manner that it becomes equal to the reference current and the current distributed to terminal pins of an organic EL panel becomes the reference current or a current corresponding thereto.