Abstract: Provided is a fabrication method of a semiconductor integrated circuit device which comprises forming a pushing mechanism by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal, placing an elastomer in the groove so that a predetermined amount exceeds the groove, and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. The present invention makes it possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

Abstract: In a method of irradiating an object with simulated solar radiation using a plurality of light sources, the object is irradiated with simulated solar radiation resulting from superimposed light rays from a plurality of light sources including light sources having different times at which light emission output reaches a peak.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A testing apparatus and a fabricating method of a semiconductor integrated circuit device for reducing the fabrication cost by placing, in the wafer level burn-in, divided contactors in equally contact with the full surface of wafer, enabling repair of each contactor and improving the yield of contactors. The cassette structure of the mechanical pressurizing system in the testing apparatus is structured with a plurality of divided silicon contactor blocks and a guide frame for integrating these blocks and employs the wafer full surface simultaneous contact system of the divided contactor integration type. Each probe of the silicon contactor is equally placed in contact in the predetermined pressure with each test pad of each chip of the test wafer by mechanically pressuring each silicon contactor block which moves individually, the test control signal is supplied to each chip and this test result signal is obtained for the wafer level burn-in test.

Abstract: A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

Abstract: Electrode pads are formed on a tape circuit to correspond to positions of solder bumps on an IC. A plurality of pins formed on a periphery of the tape circuit provide electrical connection between the tape circuit and a mother socket. An elastomer sheet is provided between a portion of the tape circuit, on which the electrode pads are formed and the IC is mounted, and the mother socket, and a side surface of the sheet, which contacts with the tape circuit, is formed with cut grooves in lattice fashion such that respective centers of the electrode pads substantially coincide with intersections of the grooves.

Abstract: A testing apparatus and a fabricating method of a semiconductor integrated circuit device for reducing the fabrication cost by placing, in the wafer level burn-in, divided contactors in equally contact with the full surface of wafer, enabling repair of each contactor and improving the yield of contactors. The cassette structure of the mechanical pressurizing system in the testing apparatus is structured with a plurality of divided silicon contactor blocks and a guide frame for integrating these blocks and employs the wafer full surface simultaneous contact system of the divided contactor integration type. Each probe of the silicon contactor is equally placed in contact in the predetermined pressure with each test pad of each chip of the test wafer by mechanically pressuring each silicon contactor block which moves individually, the test control signal is supplied to each chip and this test result signal is obtained for the wafer level burn-in test.

Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Abstract: In a hybrid power supply system which includes an electric double layer capacitor (10) having a pair of capacitor terminals (11 and 12), an energy storage (70a), and first and second bidirectional DC/DC converters (30a and 30b), the above-mentioned pair of capacitor terminals of the electric double layer capacitor are connected to a load (60a) through the first bidirectional DC/DC converter and are connected to the energy storage through the second bidirectional DC/DC converter.

Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Abstract: A probing device for electrically contacting a plurality of electrodes aligned on an object to be tested so as to transfer electrical signal therewith. The probing device includes a wiring sheet formed by aligning a plurality of contact electrodes, corresponding to each of the electrodes on the object to be tested. Each of the contact electrodes is formed with a plurality of projecting probes on one surface of an insulator sheet with extension wiring electrically connected to each of the contact electrodes being formed on basis of a conductor thin film formed on either the one surface or an opposite surface the insulator sheet. Means also are provided for applying contacting pressure to the wiring sheet to obtain electrical conduction between the extension wiring and the object to be tested whereby contacting tips of the projecting contact probes formed on each of the contact electrodes contact and form an electrical connection with an electrode on the object to be tested.

Abstract: In industrial production of &ohgr;-hydroxyaliphatic acid being an important intermediate for large cyclic lactone-based perfumes, using dicarboxylate ester which is inexpensive and readily obtainable, a method, with high yield and improved selectively, for making a 2-(&ohgr;-alkoxycarbonylalkanoyl)-4-butanolide and an alkaline metal salt thereof, an ester of &ohgr;-hydroxy-(&ohgr;-3)-ketoaliphatic acid as a novel compound and a derivative thereof, and a method for making the same are provided.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A process for producing a polyphenylene ether, which comprises contacting, with an aqueous solution of a chelating agent, a polyphenylene ether solution and adding a water-soluble poor solvent for the polyphenylene ether to precipitate the polyphenylene ether; and recovering the thus precipitated polyphenylene ether. A mixture remaining after the recovery of the polyphenylene ether is brought into contact with water to extract the water-soluble poor solvent, and a water phase containing the thus extracted water-soluble poor solvent is recovered by separation. The water-soluble poor solvent is separated and removed from the water phase by distillation, and the whole or a part of the remaining water phase is recycled as water to be brought into contact with the mixture, the remaining water phase having a content of a high-boiling-point organic substance of 1 wt. % or less.

Abstract: An energy adjusting device is provided which transfers energy charged in an arbitrary cell to the input/output terminals of a unit energy storage device. The energy adjusting device includes a transformer having a plurality of primary coils and a secondary coil mutually coupled magnetically but electrically insulated, switching circuits which open and close the circuits of the primary coils of the transformer connected to the arbitrary cell, a circuit connecting the secondary coil of the transformer via a rectifying circuit to the input/output terminals of the unit energy storage device, and a control circuit which, by operating the switching circuits, adjusts the amount of energy stored in the cells to a specific ratio with respect to the amount of energy stored by the unit energy storage device.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: Methods for making 2-(&ohgr;-alkoxycarbonylalkanoyl)-4-butanolide and derivatives thereof, esters of &ohgr;-hydroxy-(&ohgr;-3)-ketoaliphatic acid and derivatives thereof, which are useful as a variety of synthetic raw materials and intermediates, and are prepared as intermediates in the production step of &ohgr;-hydroxyaliphatic acid being important intermediates of large cyclic lactone-based perfumes in the perfume industry.