Patents by Inventor Akio Idehara
Akio Idehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11831402Abstract: A slave node (300) is slave equipment that operates in accordance with a control frame transmitted from a master node (200). The slave node calculates a control frame statistic that is a statistic of one or more control frames transmitted from the master equipment and estimates a master environment value based on the calculated control frame statistic. The slave node measures a slave environment value. The slave node estimates a frequency deviation of a master clock based on the estimated master environment value and estimates a frequency deviation of a slave clock based on the measured slave environment value. The slave node modifies a clock value of the slave clock based on a difference between the frequency deviation of the master clock and the frequency deviation of the slave clock.Type: GrantFiled: July 22, 2021Date of Patent: November 28, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Akio Idehara, Hirotaka Motai, Yurika Terada, Bampei Kaji, Toshiyuki Otani
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Patent number: 11467944Abstract: In an information processing apparatus (100), obtaining units such as a first obtaining unit (200) and a second obtaining unit (230) obtain general-purpose OS information in a test operation phase in which a real-time application and a plurality of general-purpose applications are executed. The general-purpose OS information is information on use of hardware by each of the plurality of general-purpose applications executed in the test operation phase. A management unit (220) verifies whether or not a condition to place a restriction on the use of the hardware is satisfied for each general-purpose application based on the general-purpose OS information obtained by the obtaining unit. The management unit (220), when the condition is verified as being satisfied, places a restriction on the use of the hardware for an applicable general-purpose application in an actual operation phase in which the real-time application and the plurality of general-purpose applications are executed.Type: GrantFiled: September 14, 2020Date of Patent: October 11, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yurika Terada, Akio Idehara, Takehisa Mizuguchi, Ryohei Kuba, Shinichi Ochiai, Hiroki Konaka
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Publication number: 20220308912Abstract: A log acquisition unit (111) acquires an activity log concerning an information processing device in which a guest OS (Operating System) operates on a hypervisor, the activity log including a monitoring object log on a monitoring object item and a factor candidate log on each of a plurality of factor candidate items that influence the monitoring object item. A factor identification unit (112) identifies a factor candidate item for which a difference between a value indicated by the factor candidate log in a normal state in which a value indicated by the monitoring object log is within a criterion range and a value indicated by the factor candidate log in an abnormal state in which a value indicated by the monitoring object log is out of the criterion range exceeds a threshold. A setting changing unit (113) decides a setting item, assigned to the identified factor candidate item, as a changing object item.Type: ApplicationFiled: June 15, 2022Publication date: September 29, 2022Applicant: Mitsubishi Electric CorporationInventors: Ryosuke YAMAMOTO, Akio IDEHARA, Masayuki KIRIMURA
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Publication number: 20210351856Abstract: A slave node (300) is slave equipment that operates in accordance with a control frame transmitted from a master node (200). The slave node calculates a control frame statistic that is a statistic of one or more control frames transmitted from the master equipment and estimates a master environment value based on the calculated control frame statistic. The slave node measures a slave environment value. The slave node estimates a frequency deviation of a master clock based on the estimated master environment value and estimates a frequency deviation of a slave clock based on the measured slave environment value. The slave node modifies a clock value of the slave clock based on a difference between the frequency deviation of the master clock and the frequency deviation of the slave clock.Type: ApplicationFiled: July 22, 2021Publication date: November 11, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Akio IDEHARA, Hirotaka MOTAI, Yurika TERADA, Bampei KAJI, Toshiyuki OTANI
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Publication number: 20200409821Abstract: In an information processing apparatus (100), obtaining units such as a first obtaining unit (200) and a second obtaining unit (230) obtain general-purpose OS information in a test operation phase in which a real-time application and a plurality of general-purpose applications are executed. The general-purpose OS information is information on use of hardware by each of the plurality of general-purpose applications executed in the test operation phase. A management unit (220) verifies whether or not a condition to place a restriction on the use of the hardware is satisfied for each general-purpose application based on the general-purpose OS information obtained by the obtaining unit. The management unit (220), when the condition is verified as being satisfied, places a restriction on the use of the hardware for an applicable general-purpose application in an actual operation phase in which the real-time application and the plurality of general-purpose applications are executed.Type: ApplicationFiled: September 14, 2020Publication date: December 31, 2020Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yurika TERADA, Akio IDEHARA, Takehisa MIZUGUCHI, Ryohei KUBA, Shinichi OCHIAI, Hiroki KONAKA
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Publication number: 20200257630Abstract: A history storage area (106) stores, for each of a plurality of pieces of data, number of times of access via a file system. A cache management unit (119), when access to the plurality of pieces of data not via the file system occurs, sets as overwrite prohibition data and caches in a disc cache area (108), data for which number of times of access that is equal to or more than a threshold is stored in the history storage area (106), the threshold being determined based on number of times of access of the plurality of pieces of data.Type: ApplicationFiled: December 18, 2017Publication date: August 13, 2020Applicant: Mitsubishi Electric CorporationInventors: Tatsuya YAMADA, Hirotaka MOTAI, Akio IDEHARA, Kotaro HASHIMOTO, Takehisa MIZUGUCHI
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Patent number: 10680849Abstract: A built-in apparatus includes a response time buffer (11) that stores a response time, a calculation result buffer (14) that stores a calculated frame, and a transmission part (130). The transmission part (130) obtains second data and start processing for calculating a frame check sequence from the second data, upon receiving a transmission command (310), judges whether frame transmission processing for generating and transmitting the second data and the frame check sequence calculated from the second data as a response frame (320) will be completed within the response time, and transmits the calculated frame stored in the calculation result buffer (14) as the response frame (320) when judging that the frame transmission processing will not be completed within the response time.Type: GrantFiled: November 24, 2015Date of Patent: June 9, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Akio Idehara, Tomohisa Yamaguchi, Hirotaka Motai
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Publication number: 20190303172Abstract: A hypervisor (130) assigns a first device (101) that is supported by a device driver installed in a first operating system (141) to the first operating system. In addition, the hypervisor assigns a second device (102) that is not supported by the device driver installed in the first operating system to a second operating system (142).Type: ApplicationFiled: November 16, 2016Publication date: October 3, 2019Applicant: Mitsubishi Electric CorporationInventors: Yurika TAKAHASHI, Akio IDEHARA, Takehisa MIZUGUCHI, Ryohei KUBA
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Publication number: 20180307640Abstract: A data transfer apparatus (10) performs data transfer between a main storage device (12) and a peripheral device (13) such as a secondary storage device (131). The data transfer apparatus (10) estimates the frequency of occurrence of the data transfer on the basis of information such as processing executed in a processor (11), sets a transfer length shorter as the frequency of occurrence of the data transfer is higher, and instructs data transfer between the main storage device (12) and the peripheral device (13) in accordance with the transfer length being set, the transfer length indicating the amount of data transferred in one execution of the data transfer.Type: ApplicationFiled: November 26, 2015Publication date: October 25, 2018Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Hirotaka MOTAI, Masahiro DEGUCHI, Akio IDEHARA, Mitsuo SHIMOTANI, Shu MURAYAMA, Tetsuji FUJISAKI
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Publication number: 20180270080Abstract: A built-in apparatus includes a response time buffer (11) that stores a response time, a calculation result buffer (14) that stores a calculated frame, and a transmission part (130). The transmission part (130) obtains second data and start processing for calculating a frame check sequence from the second data, upon receiving a transmission command (310), judges whether frame transmission processing for generating and transmitting the second data and the frame check sequence calculated from the second data as a response frame (320) will be completed within the response time, and transmits the calculated frame stored in the calculation result buffer (14) as the response frame (320) when judging that the frame transmission processing will not be completed within the response time.Type: ApplicationFiled: November 24, 2015Publication date: September 20, 2018Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Akio IDEHARA, Tomohisa YAMAGUCHI, Hirotaka MOTAI
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Patent number: 9009513Abstract: Timers #0 through #3 are each supplied with a period for prohibiting a change in a power supply voltage. An OS #A or an OS #B determines necessity to change an operating frequency for a CPU core corresponding to any of the timers #0 through #3 when the timer exceeds the prohibition period. It is determined whether it is necessary to change a power supply voltage supplied to CPU cores #0 through #3 when the OS #A or the OS #B determines necessity to change an operating frequency. When it is determined that a power supply voltage needs to be changed, a power supply voltage change portion 20 changes the power supply voltage supplied to the CPU cores #0 through #3. Therefore, it is possible to improve the processing efficiency without needing to acquire inter-OS lock.Type: GrantFiled: January 31, 2012Date of Patent: April 14, 2015Assignee: Renesas Electronics CorporationInventors: Hitoshi Yamamoto, Akio Idehara, Yasuhiro Tawara
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Publication number: 20120198257Abstract: Timers #0 through #3 are each supplied with a period for prohibiting a change in a power supply voltage. An OS #A or an OS #B determines necessity to change an operating frequency for a CPU core corresponding to any of the timers #0 through #3 when the timer exceeds the prohibition period. It is determined whether it is necessary to change a power supply voltage supplied to CPU cores #0 through #3 when the OS #A or the OS #B determines necessity to change an operating frequency. When it is determined that a power supply voltage needs to be changed, a power supply voltage change portion 20 changes the power supply voltage supplied to the CPU cores #0 through #3. Therefore, it is possible to improve the processing efficiency without needing to acquire inter-OS lock.Type: ApplicationFiled: January 31, 2012Publication date: August 2, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Hitoshi YAMAMOTO, Akio IDEHARA, Yasuhiro TAWARA
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Publication number: 20120179901Abstract: A specific one of shared devices 601 is associated with a non-privileged OS 200 not having control rights of the shared devices 601, as a specified device, and a control right of the specified device is given to a privileged OS 100 until activation of the non-privileged OS 200. When the non-privileged OS 200 is activated, the control right of the specified device is transferred from the privileged OS 100 to the non-privileged OS 200. Thus, when the non-privileged OS 200 uses the specified device, the non-privileged OS 200 can directly issue a request to use the specified device. Real-time responsiveness needed for the non-privileged OS 200 may be thereby ensured without the need for waiting for processes of a VM 300 and the privileged OS 100.Type: ApplicationFiled: October 1, 2009Publication date: July 12, 2012Applicant: Mitsubishi Electric CorporationInventors: Akio Idehara, Hitoshi Yamamoto