Patents by Inventor Akio Igarashi

Akio Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100270357
    Abstract: The present invention provides a solder ball printing apparatus in which solder balls are uniformly dispersed on a mask surface and are loaded into an opening area of the mask. A solder ball shaking and discharging unit includes a solder ball reception unit which receives solder balls from a solder ball reservoir unit, a wire member in a convex shape which is attached to surround a solder ball shaking and discharging port of the solder ball shaking and discharging unit and in which a plurality of wire members are arranged at predetermined intervals, and solder ball rotating and collecting mechanisms which sweep and collect the solder balls at the wire member in a convex shape.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 28, 2010
    Inventors: Makoto HONMA, Akio Igarashi, Naoaki Hashimoto, Noriaki Mukai
  • Patent number: 7779392
    Abstract: Object information is read that denotes a load state of the object from storage and selects an object having a load that is lower than a predetermined value. Then, a reference to an object allocation control part is returned that allocates the selected object to a destination as a response through communicating means. In allocating an object, the object information is read from the storage to select an object having a load that is lower than a predetermined value. Then, a reference to a dispatcher is returned that executes the selected object to the destination as a response through the communicating means. In executing the object, the object information is read from the storage and executes the object if the object has a load that is lower than a predetermined threshold value.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: August 17, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Sashino, Tomohiko Shigeoka, Hirokazu Fujiwara, Atsuhiro Yokoro, Akio Igarashi
  • Publication number: 20100072259
    Abstract: Solder bumps formed on an electrode portion of a semiconductor chip are recently miniaturized, and when printing by using solder balls, the solder balls are also miniaturized. Therefore, it is required to print solder balls for printing with accuracy. Instead of a conventional squeegee, a solder ball loading member including a plurality of semi-spiral wire rods is provided at a print head portion for printing solder balls, and by pressing the solder ball loading member to a mask surface with a predetermined pressing force, turning forces of the solder balls are added by spaces formed by the wire rods. Accordingly, the solder balls are moderately dispersed, and are squeezed into an opening portion of the mask.
    Type: Application
    Filed: August 19, 2009
    Publication date: March 25, 2010
    Inventors: Makoto HONMA, Noriaki MUKAI, Shinichiro KAWABE, Akio IGARASHI, Naoaki HASHIMOTO
  • Publication number: 20070254398
    Abstract: A method of manufacturing a high-speed operable and broadband operable semiconductor device where a light-receiving element section, a CMOS element and a bipolar transistor element having a double polysilicon structure are formed on one chip. By performing the same conductivity type ion implantation, the same conductivity type diffusion layers (examples thereof include N-type diffusion layers, an anode diffusion layer, P-type well diffusion layer and collector diffusion layer as P-type diffusion layers, a cathode diffusion layer and collector contact diffusion layer as N-type diffusion layers, a source/drain diffusion layer and base Poly-Si diffusion layer as N-type diffusion layers, and a source/drain diffusion layer and base Poly-Si diffusion layer as P-type diffusion layers) are simultaneously formed in two or more regions among a light-receiving element region, CMOS element region and bipolar transistor element region of a semiconductor substrate or of an epitaxial layer over the semiconductor substrate.
    Type: Application
    Filed: September 28, 2006
    Publication date: November 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro Wakabayashi, Takao Setoyama, Yuji Asano, Akio Igarashi
  • Publication number: 20050144607
    Abstract: Object information is read that denotes a load state of the object from storage and selects an object having a load that is lower than a predetermined value. Then, a reference to an object allocation control part is returned that allocates the selected object to a destination as a response through communicating means. In allocating an object, the object information is read from the storage to select an object having a load that is lower than a predetermined value. Then, a reference to a dispatcher is returned that executes the selected object to the destination as a response through the communicating means. In executing the object, the object information is read from the storage and executes the object if the object has a load that is lower than a predetermined threshold value.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 30, 2005
    Inventors: Atsushi Sashino, Tomohiko Shigeoka, Hirokazu Fujiwara, Atsuhiro Yokoro, Akio Igarashi