Patents by Inventor Akio Iwata
Akio Iwata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240114716Abstract: A first light-emitting element and a second light-emitting element that have a resonance structure that causes output light from a light-emission functional layer to resonate between a reflective layer and a semi-transmissive reflective layer, and a pixel definition layer, and in which an aperture part is formed to correspond to each of the first light-emitting element and the second light-emitting element, are formed on a base. A first interval between the reflective layer and the semi-transmissive reflective layer in the first light-emitting element and a second interval between the reflective layer and the semi-transmissive reflective layer in the second light-emitting element are different, and a film thickness of the pixel definition layer is less than a difference between the first interval and the second interval.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Applicant: SEIKO EPSON CORPORATIONInventors: Ryoichi NOZAWA, Atsushi AMANO, Takeshi KOSHIHARA, Akio FUKASE, Shinichi IWATA
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Publication number: 20230409786Abstract: A computer-readable recording medium stores therein a design aiding program that aids layout design of a circuit under design and that is executable by a computer, the design aiding program includes: an instruction for disposing a plurality of cells in a layout of the circuit under design, based on circuit information related to the circuit under design; and an instruction for determining, for two adjacent cells of the cells disposed in the layout, a disposal number and disposal positions of cut metals to be disposed between the two adjacent cells, based on lengths of branch wires in each of the two adjacent cells and a type of a wire that includes the branch wires, each of the lengths being between a via and a cell frame of said each of the two adjacent cells, the via being on the wire in the two adjacent cells.Type: ApplicationFiled: February 17, 2023Publication date: December 21, 2023Applicant: Fujitsu LimitedInventors: Hitomi KOBAYASHI, Akio IWATA
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Patent number: 9727988Abstract: A logging data about a signal identifier of the I/O signals which changed in on/off state are stored in a ring buffer. A logging screen includes identifier display parts, logic-graph display parts and first and second cursors. The logic-graph display parts display logic graphs associated with signal identifiers, respectively. When any one of the identifier display parts displayed on the logging screen is clicked, the logging screen is changed to an input window. If a desired input identifier is input in the input window, the logging data associated with the signal identifier is read from the ring buffer and the logic graph is displayed in the logic-graph display parts. The logic graph can be modified.Type: GrantFiled: January 22, 2013Date of Patent: August 8, 2017Assignee: TOSHIBA KIKAI KABUSHIKI KAISHAInventors: Akio Iwata, Toshihito Okamoto
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Patent number: 8792342Abstract: A bandwidth guaranteeing apparatus includes a controller that collects guaranteed communication rate for a plurality of devices on an OVC between a user-side apparatus and the bandwidth guaranteeing apparatus; and a determiner that obtains the smallest value of the guaranteed communication rate collected by the controller and upon a bandwidth change request that is for the OVC and from the user-side apparatus, determines whether the bandwidth change request can be accepted, based on the obtained guaranteed communication rate.Type: GrantFiled: March 28, 2012Date of Patent: July 29, 2014Assignee: Fujitsu LimitedInventors: Haruyuki Takeyoshi, Akio Iwata
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Publication number: 20120300624Abstract: A bandwidth guaranteeing apparatus includes a controller that collects guaranteed communication rate for a plurality of devices on an OVC between a user-side apparatus and the bandwidth guaranteeing apparatus; and a determiner that obtains the smallest value of the guaranteed communication rate collected by the controller and upon a bandwidth change request that is for the OVC and from the user-side apparatus, determines whether the bandwidth change request can be accepted, based on the obtained guaranteed communication rate.Type: ApplicationFiled: March 28, 2012Publication date: November 29, 2012Applicant: FUJITSU LIMITEDInventors: Haruyuki TAKEYOSHI, Akio Iwata
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Patent number: 7864555Abstract: A pair of power supply lines that are orthogonal to the border with the cell array are placed, for each one-bit processing circuit of the data processing unit, in a semiconductor storage device such as SRAM or the like comprising a data processing unit for writing data to memory cells and reading it therefrom, a row decode unit for driving the word lines of the memory cells, and a timing control unit for generating a control pulse for the data processing unit, all of which are arranged around the circumference of a cell array in which memory cells are arrayed in a grid-like fashion. MOS transistors are placed between the power supply lines in such a position that the principal axis direction of the gate pattern is orthogonal to the two aforementioned wirings, and are closely arrayed in the longitudinal direction of the power supply lines.Type: GrantFiled: August 28, 2008Date of Patent: January 4, 2011Assignee: Fujitsu LimitedInventors: Mayumi Inage, Akio Iwata, Gaku Ito
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Patent number: 7541655Abstract: A semiconductor device includes: a first circuit in which a diffusion area A1, a first gate G1, a diffusion area A2, a second gate G2 and a diffusion area A3 constitute two transistors; and a second circuit in which a diffusion area B1, the first gate G1, a diffusion area B2, the second gate G2 and a diffusion area B3 constitute two transistors. The diffusion areas A1 and B3, the diffusion areas A2 and B2 and the diffusion areas A3 and B1 are connected. Alternatively, the diffusion areas A1, A3 and B2 and the diffusion areas A2, B1 and B3 are connected.Type: GrantFiled: October 7, 2005Date of Patent: June 2, 2009Assignee: Fujitsu LimitedInventors: Akio Iwata, Gaku Itoh
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Publication number: 20090003027Abstract: A pair of power supply lines that are orthogonal to the border with the cell array are placed, for each one-bit processing circuit of the data processing unit, in a semiconductor storage device such as SRAM or the like comprising a data processing unit for writing data to memory cells and reading it therefrom, a row decode unit for driving the word lines of the memory cells, and a timing control unit for generating a control pulse for the data processing unit, all of which are arranged around the circumference of a cell array in which memory cells are arrayed in a grid-like fashion. MOS transistors are placed between the power supply lines in such a position that the principal axis direction of the gate pattern is orthogonal to the two aforementioned wirings, and are closely arrayed in the longitudinal direction of the power supply lines.Type: ApplicationFiled: August 28, 2008Publication date: January 1, 2009Applicant: FUJITSU LIMITEDInventors: Mayumi Inage, Akio Iwata, Gaku Ito
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Publication number: 20060273407Abstract: A semiconductor device includes: a first circuit in which a diffusion area A1, a first gate G1, a diffusion area A2, a second gate G2 and a diffusion area A3 constitute two transistors; and a second circuit in which a diffusion area B1, the first gate G1, a diffusion area B2, the second gate G2 and a diffusion area B3 constitute two transistors. The diffusion areas A1 and B3, the diffusion areas A2 and B2 and the diffusion areas A3 and B1 are connected. Alternatively, the diffusion areas A1, A3 and B2 and the diffusion areas A2, B1 and B3 are connected.Type: ApplicationFiled: October 7, 2005Publication date: December 7, 2006Applicant: FUJITSU LIMITEDInventors: Akio Iwata, Gaku Itoh
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Patent number: 6334522Abstract: In a control apparatus for a passenger conveyor, passenger detecting devices provided on balustrades distinguish and monitor the absence/presence of a passenger within first zones on an entrance gate side and an exit gate side including floor boards of the entrance gate side and the exit gate side, and the absence/presence of a passenger within second zones on the entrance gate side and the exit gate side adjacent to and beyond the first zones, covering the first zones. When a passenger is detected in the second zone on the entrance gate side in a standby mode, a mode switching circuit switches the operating mode to an intermediate mode, and when a passenger is detected in the first zone on the entrance gate side in the intermediate mode, the mode switching circuit switches the operating mode to a conveying mode.Type: GrantFiled: December 18, 2000Date of Patent: January 1, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasumasa Haruta, Yoshiki Sugiyama, Haruhiko Nakamura, Akio Iwata
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Publication number: 20010002644Abstract: In a control apparatus for a passenger conveyor, passenger detecting devices provided on balustrades distinguish and monitor the absence/presence of a passenger within first zones on an entrance gate side and an exit gate side including floor boards of the entrance gate side and the exit gate side and the absence/presence of a passenger within second zones on the entrance gate side and the exit gate side adjacent to the outside of the first zones so as to cover the first zones. In the case where a passenger is detected in the second zone on the entrance gate side in a standby mode, a mode switching circuit switches the operating mode to an intermediate mode, and in the case where a passenger is detected in the first zone on the entrance gate side in the intermediate mode, the mode switching circuit switches the operating mode to a conveying mode.Type: ApplicationFiled: December 18, 2000Publication date: June 7, 2001Inventors: Yasumasa Haruta, Yoshiki Sugiyama, Haruhiko Nakamura, Akio Iwata
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Patent number: 5107975Abstract: A control device for a passenger conveyor includes an upward moving device for moving the passenger conveyor upward, a downward moving device for moving the passenger conveyor downward, a detection device of detecting an anomaly of the movement of the passenger conveyor, an emergency stopping device for stopping the movement of the passenger conveyor by emergency stopping either the upward moving device or the downward moving device which is operated when the detection device detects an anomaly, a control device for operating the other of the upward moving device and the downward moving device after the emergency stopping device stops the passenger conveyor to forcibly move the passenger conveyor in a direction opposite to that in which it is moving before it is stopped, and a forcible operation stopping device for stopping the forcible movement of the passenger conveyor when the detection device is reset due to the passenger conveyor being forcibly moved by the control device.Type: GrantFiled: July 20, 1990Date of Patent: April 28, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Akio Iwata
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Patent number: 3961678Abstract: This invention relates to a simple electric bicycle characterized in that a swing-arm is supported at a fulcrum provided at a position which is upper and outer side of a bicycle wheel and forward of a wheel axle in the freely swingable manner, the arm is provided with a motor at a position where a swinging circular arc of the swing-arm and an outer periphery of the wheel intersect each other, a driving roller is put around a motor shaft to convey a driving force of the motor to the wheel by contacting with a tire, and thereby a proper driving force can be obtained in proportion to a load.Type: GrantFiled: August 22, 1974Date of Patent: June 8, 1976Assignee: Mitsubadenkiseisakusho Company, Ltd.Inventors: Yukio Hirano, Akio Iwata