Patents by Inventor Akio Yanagimachi

Akio Yanagimachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4675868
    Abstract: An error correction system for a difference set cyclic (272,190) code with 190 data bits and 82 test bits in a coded transmission teletext system which transmits character information on the vertical blanking interval of a television signal has been improved in peripheral circuits for operating an error correction circuit. A first improvement is to correct only designated packets which are in frame synchronization condition and/or designated by an index register. A second improvement is to handle shortened (L,k) code where L is less than 272, using common hardware. A third improvement is selection of three operational modes of data to be corrected. In the first mode, uncorrected data is supplied by an external circuit, and said uncorrected data is stored temporarily in a buffer memory, and corrected data is stored in said buffer memory again to supply external circuit corrected data. Transfer of data between the buffer memory and the error correction circuit is handled by wired logic hardware apparatus.
    Type: Grant
    Filed: March 26, 1985
    Date of Patent: June 23, 1987
    Assignees: OKI Electric Industry Co., Ltd., Nippon Hoso Kyokai
    Inventors: Hirohisa Shishikura, Ichiro Sase, Akio Yanagimachi, Osamu Yamada
  • Patent number: 4672612
    Abstract: An error correction system for a difference set cyclic (272, 190) code with 190 data bits and 82 test bits in a packet which is transmitted on a vertical blanking interval of a television signal has been improved. The present system comprises a buffer memory for storing an original data which is subject to correction and corrected data, and an error correction circuit having at least a syndrome register, a majority circuit and a data register. The data transfer between the buffer memory and the error correction circuit is effected by wired logic hardware means without using software operation time of a programmed computer so that computer operation time is not wasted merely for error correction.
    Type: Grant
    Filed: March 26, 1985
    Date of Patent: June 9, 1987
    Assignees: OKI Electric, Nippon Hoso Kyokai, Victor Co.
    Inventors: Hirohisa Shishikura, Ichiro Sase, Akio Yanagimachi, Osamu Yamada, Shigeharu Ueguri
  • Patent number: 3991265
    Abstract: A signal editing and processing technique for converting a plurality of continuous signals, especially long term continuous audio signals respectively relating to short term still picture signals, to a transmitting signal in which signal transmission periods and pause periods are provided, having an integer ratio of time duration with each other, wherein other signals, especially the picture signals, should be transmitted. All continuous signals are sequentially converted to digital signals addressed in accordance with relevant continuous signals, and once stored in arbitrary positions of a memory, and then read out in a given multiplexed sequence corresponding to the transmission periods of the transmitting signal. The read out multiplexed digital signals are sequentially stored in another memory, and then read out with a given high speed equal to that of the signal transmission.
    Type: Grant
    Filed: May 17, 1974
    Date of Patent: November 9, 1976
    Assignees: Hitachi Electronics, Ltd., Hitachi, Ltd., Nippon Hoso Kyokai
    Inventors: Masaaki Fukuda, Tatsuo Kayano, Takashi Uehara, Takehiko Yoshino, Eiichi Sawabe, Hisakichi Yamane, Akio Yanagimachi, Teruhiro Takezawa, Michio Masuda, Hiroaki Nabeyama
  • Patent number: 3988528
    Abstract: A transmission system for transmitting a plurality of information signals having arbitrary time lengths through a plurality of transmission channels, wherein at a transmitter end said plurality of information signals are allotted to said plurality of transmission channels in such a manner that in each transmission channel an information signal is followed by other information signal and a control signal comprising an index of an information composed of one or more information signals, a transmission channel or channels through which said one or more information signals are transmitted and one or more timings of transition of said one or more information signals is transmitted in addition to said information signals and at a receiver end a desired information signal is selectively extracted and reproduced under the control of said control signal.
    Type: Grant
    Filed: August 27, 1973
    Date of Patent: October 26, 1976
    Assignees: Nippon Hoso Kyokai, Hitachi, Ltd., Hitachi Electronics Co., Ltd.
    Inventors: Akio Yanagimachi, Hisakichi Yamane, Eiichi Sawabe, Takashi Uehara, Takehiko Yoshino, Teruhiro Takezawa, Michio Masuda, Hiroaki Nabeyama, Masaaki Fukuda, Tatsuo Kayano
  • Patent number: 3953881
    Abstract: A color picture information recording and reproducing system comprises a recording device for selectively recording color picture information and a pilot signal generator. In order to eliminate hue distortion of the reproduced color picture in case of selecting, recording, repeatedly reproducing and displaying a color picture signal of a single frame or a single field in a television broadcasting program or a still picture broadcasting program edited from different information at every frame or field, an input chrominance subcarrier and pilot signal of the output of a frequency locked signal generator are recorded on a record carrier together with an input color signal. The phase of the reproduced chrominance subcarrier is made continuous between adjacent frames or field by interleaving the pilot signal and a relation of frequency interleaving is maintained so as to eliminate phase jitter.
    Type: Grant
    Filed: March 25, 1975
    Date of Patent: April 27, 1976
    Assignees: Nippon Hose Kyokai, Hitachi, Ltd.
    Inventors: Akio Yanagimachi, Osamu Yamada
  • Patent number: 3936595
    Abstract: A signal transmission system for transmitting programed information such as a programed instruction comprising at a transmitter end circuitry for producing a number of program materials and a control signal which is used at a receiver end to control the manner of sequentially connecting program materials in accordance with a response input of a student to construct at least one significant program. The system comprises at the receiver end circuitry for detecting the control signal, circuitry for extracting desired program materials in a desired sequence with the aid of the control signal in accordance with the response input of the student and apparatus for displaying the extracted desired program materials.
    Type: Grant
    Filed: August 29, 1973
    Date of Patent: February 3, 1976
    Assignees: Nippon Hoso Kyokai, Hitachi, Ltd., Hitachi Electronics Co., Ltd.
    Inventors: Akio Yanagimachi, Takashi Uehara, Tetsuo Yamamoto, Hisakichi Yamane, Eiichi Sawabe, Takehiko Yoshino, Teruhiro Takezawa, Michio Masuda, Hiroaki Nabeyama, Masaaki Fukuda, Tatsuo Kayano
  • Patent number: 3932698
    Abstract: A multiplex signal transmission system in which a plurality of information signals, having respectively arbitrary time durations and being arranged in time-serial form, are sequentially divided into a plurality of signal portions by a predetermined time period, said signal portions being successively allocated in time-parallel form to a plurality of transmission channels, each of which has a time duration of said predetermined time period, and being transmitted repeatedly through respectively allocated channels every said time duration, comprises a channel shift means for shifting sequentially the channel allocation of said signal portions at predetermined time periods, and a signal transmitting means for transmitting in time-parallel form said signal portions derived from said channel shift means repeatedly through every preceding channels.
    Type: Grant
    Filed: August 27, 1973
    Date of Patent: January 13, 1976
    Assignees: Nippon Hoso Kyokai, Hitachi, Ltd., Hitachi Electronics, Ltd.
    Inventors: Akio Yanagimachi, Osamu Yamada, Hisakichi Yamane, Eiichi Sawabe, Takashi Uehara, Takehiko Yoshino, Teruhiro Takezawa, Michio Masuda, Hiroaki Nabeyama, Masaaki Fukuda, Tatsuo Kayano