Patents by Inventor Akira Ezaki

Akira Ezaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145558
    Abstract: Provided is a semiconductor device including: a substrate containing a semiconductor material; an electrode provided on a substrate surface of the substrate, the electrode containing a metal material; and a mixed member provided on the substrate surface to be in contact with the electrode, the mixed member containing the semiconductor material and the metal material, in which a portion of the substrate surface is exposed at an end of the substrate.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Shinji ONDUKA, Akira EZAKI
  • Publication number: 20210296455
    Abstract: Provided is a semiconductor device including: a substrate containing a semiconductor material; an electrode provided on a substrate surface of the substrate, the electrode containing a metal material; and a mixed member provided on the substrate surface to be in contact with the electrode, the mixed member containing the semiconductor material and the metal material, in which a portion of the substrate surface is exposed at an end of the substrate.
    Type: Application
    Filed: August 31, 2020
    Publication date: September 23, 2021
    Inventors: Shinji Onduka, Akira Ezaki
  • Patent number: 10141399
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a first insulating layer, and a first insulating region. The second semiconductor region is provided on the first semiconductor region. The first insulating layer is provided around at least a portion of the first semiconductor region and at least a portion of the second semiconductor region. The first insulating layer contacts the second semiconductor region. The first insulating region is provided around at least a portion of the first insulating layer.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: November 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Okumura, Masanobu Tsuchitani, Hiroto Misawa, Akira Ezaki, Tatsuya Shiraishi
  • Publication number: 20160276430
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a first insulating layer, and a first insulating region. The second semiconductor region is provided on the first semiconductor region. The first insulating layer is provided around at least a portion of the first semiconductor region and at least a portion of the second semiconductor region. The first insulating layer contacts the second semiconductor region. The first insulating region is provided around at least a portion of the first insulating layer.
    Type: Application
    Filed: September 7, 2015
    Publication date: September 22, 2016
    Inventors: Hideki Okumura, Masanobu Tsuchitani, Hiroto Misawa, Akira Ezaki, Tatsuya Shiraishi
  • Patent number: 9370885
    Abstract: A case molded article is molded by injecting resin into a molding space formed in an in-mold decoration die; meanwhile, foil is joined to the surface of the case molded article. After that, the foil is peeled off from the surface of the case molded article while leaving a pattern layer at least on the upper ends of the corners of the rising wall on the case molded article. Subsequently, the foil is peeled off from the surface of the case molded article while leaving the pattern layer at other points where the foil is joined to the surface of the case molded article.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: June 21, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kenji Nishitani, Masahumi Kurisu, Masamitsu Miyazaki, Akira Ezaki, Guangri Pei
  • Publication number: 20150056727
    Abstract: A method of inspecting a semiconductor device includes attaching an inspection tool on a back surface of a semiconductor substrate including the semiconductor device, the inspection tool including a sheet and a holding frame, the sheet being larger than the semiconductor substrate and being provided with an opening in a center portion of the sheet, the opening being smaller than the semiconductor substrate, the holding frame holding an outer periphery of the sheet, and a supporting substrate being attached on a front surface of the semiconductor substrate, removing the supporting substrate attached on the front surface of the semiconductor substrate, and measuring electrical characteristics of the semiconductor device.
    Type: Application
    Filed: October 1, 2014
    Publication date: February 26, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daisuke YAMASHITA, Hironobu SHIBATA, Akira EZAKI
  • Publication number: 20130341830
    Abstract: A case molded article is molded by injecting resin into a molding space formed in an in-mold decoration die; meanwhile, foil is joined to the surface of the case molded article. After that, the foil is peeled off from the surface of the case molded article while leaving a pattern layer at least on the upper ends of the corners of the rising wall on the case molded article. Subsequently, the foil is peeled off from the surface of the case molded article while leaving the pattern layer at other points where the foil is joined to the surface of the case molded article.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 26, 2013
    Inventors: Kenji NISHITANI, Masahumi KURISU, Masamitsu MIYAZAKI, Akira EZAKI, Guangri PEI
  • Publication number: 20130252356
    Abstract: An aspect of one embodiment, there is provided a supporting substrate, including a first supporting substrate, an outer diameter being larger than a diameter of a semiconductor substrate and an inner diameter being smaller than the diameter of the semiconductor substrate, and a second supporting substrate, an outer diameter being smaller than the inner diameter of the first supporting substrate.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 26, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Akira EZAKI
  • Publication number: 20130240131
    Abstract: An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device, including curving a semiconductor substrate onto which a protection tape is bonded, and removing the protection tape in a state where the semiconductor substrate is curved.
    Type: Application
    Filed: February 28, 2013
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Akira EZAKI
  • Publication number: 20130244351
    Abstract: An aspect of one embodiment, there is provided a method of inspecting a semiconductor device, attaching an inspection tool on a back surface of a semiconductor substrate, the inspection tool including a sheet and a holding frame, the sheet being larger than the semiconductor substrate and being provided an opening in a center portion of the sheet, the opening being smaller than the semiconductor substrate, the holding frame holding an outer periphery of the sheet, a supporting substrate being attached on a front surface of the semiconductor substrate, removing the supporting substrate attached on the front surface of the semiconductor substrate, and inspecting electrical characteristics of the semiconductor substrate.
    Type: Application
    Filed: February 28, 2013
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daisuke YAMASHITA, Hironobu SHIBATA, Akira EZAKI
  • Patent number: 6906675
    Abstract: A multi-band antenna apparatus comprises a first conductor and a second conductor arranged with a specific interval and a feeder which feeds power to the first conductor and the second conductor, and the first conductor is divided by a slit.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: June 14, 2005
    Assignee: Harada Industry Co., Ltd.
    Inventors: Yoshihiro Satoh, Akira Ezaki, Kazuhumi Sato
  • Publication number: 20040017325
    Abstract: A multi-band antenna apparatus comprises a first conductor and a second conductor arranged with a specific interval and a feeder which feeds power to the first conductor and the second conductor, and the first conductor is divided by a slit.
    Type: Application
    Filed: April 24, 2003
    Publication date: January 29, 2004
    Applicant: HARADA INDUSTRY CO., LTD.
    Inventors: Yoshihiro Satoh, Akira Ezaki, Kazuhumi Sato
  • Patent number: 4280034
    Abstract: A compact cash register comprises a first member for freely adjusting the visual angle of the same. The first member is connected to a second member of a casing of the compact cash register so as to provide in order to adjust the visual angle of the cash register. The first member comprises a ball biased continuously by a spring. The second member includes a cavity formed on the surface of a cover of the casing. The connection between the first member and the second member allows the compact cash register to be supported obliquely. The connection may be formed as a ratchet mechanism, a pivotal mechanism and the like. The casing comprises at least two compartments each containing the compact cash register and cash, the two compartments being adjacent to each other.
    Type: Grant
    Filed: February 28, 1979
    Date of Patent: July 21, 1981
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Ezaki, Yoshiaki Kobayashi, Sigeaki Hayashi
  • Patent number: D301780
    Type: Grant
    Filed: April 24, 1987
    Date of Patent: June 20, 1989
    Assignee: Sharp Corporation
    Inventors: Akira Ezaki, Tazuo Orihara, Kiminori Yamaguchi