Patents by Inventor Akira Kuriki

Akira Kuriki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10573463
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 25, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Patent number: 10391769
    Abstract: Provided is a liquid ejecting head that ejects a liquid in a pressure chamber by a piezoelectric device, the piezoelectric device including a vibration plate, a piezoelectric layer containing lead, a first electrode provided between the vibration plate and the piezoelectric layer, and a second electrode provided on a side opposite to a side of the first electrode as viewed from the piezoelectric layer. The piezoelectric layer is preferentially oriented in a (100) plane, a lattice constant c defined by a crystal plane of the piezoelectric layer parallel to a film surface of the piezoelectric layer and a lattice constant a defined by a crystal plane perpendicular to the film surface satisfy 0.9945?c/a?1.012, and the thickness of the piezoelectric device is twice or more the thickness t (t<5 ?m) of the piezoelectric layer.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: August 27, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Hiromu Miyazawa, Masayuki Omoto, Toshiki Hara, Toshihiro Shimizu, Akira Kuriki
  • Patent number: 10355194
    Abstract: A piezoelectric device includes a piezoelectric element including a first electrode, a second electrode, and a piezoelectric layer provided between the first electrode and the second electrode, and a driving system that drives the piezoelectric element by applying voltage to the first electrode and the second electrode, in which the driving system drives the piezoelectric element at a maximum voltage that is lower than a voltage at which a tunnel current or a Poole-Frenkel current starts to be generated in the piezoelectric element.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: July 16, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Eiji Osawa, Yoshihiro Hokari, Akira Kuriki
  • Publication number: 20190051461
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI
  • Publication number: 20180370236
    Abstract: Provided is a liquid ejecting head that ejects a liquid in a pressure chamber by a piezoelectric device, the piezoelectric device including a vibration plate, a piezoelectric layer containing lead, a first electrode provided between the vibration plate and the piezoelectric layer, and a second electrode provided on a side opposite to a side of the first electrode as viewed from the piezoelectric layer. The piezoelectric layer is preferentially oriented in a (100) plane, a lattice constant c defined by a crystal plane of the piezoelectric layer parallel to a film surface of the piezoelectric layer and a lattice constant a defined by a crystal plane perpendicular to the film surface satisfy 0.9945?c/a?1.012, and the thickness of the piezoelectric device is twice or more the thickness t (t<5 ?m) of the piezoelectric layer.
    Type: Application
    Filed: June 22, 2018
    Publication date: December 27, 2018
    Inventors: Ichiro ASAOKA, Hiromu MIYAZAWA, Masayuki OMOTO, Toshiki HARA, Toshihiro SHIMIZU, Akira KURIKI
  • Patent number: 10134527
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Publication number: 20180065364
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI
  • Patent number: 9840077
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: December 12, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Publication number: 20170266970
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI
  • Patent number: 9694580
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: July 4, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Publication number: 20170098753
    Abstract: A piezoelectric device includes a piezoelectric element including a first electrode, a second electrode, and a piezoelectric layer provided between the first electrode and the second electrode, and a driving system that drives the piezoelectric element by applying voltage to the first electrode and the second electrode, in which the driving system drives the piezoelectric element at a maximum voltage that is lower than a voltage at which a tunnel current or a Poole-Frenkel current starts to be generated in the piezoelectric element.
    Type: Application
    Filed: August 30, 2016
    Publication date: April 6, 2017
    Inventors: Eiji OSAWA, Yoshihiro HOKARI, Akira KURIKI
  • Publication number: 20170057230
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: August 18, 2016
    Publication date: March 2, 2017
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI
  • Patent number: 9065051
    Abstract: A liquid ejecting head includes a piezoelectric element including a first electrode, a piezoelectric layer overlying the first electrode with an orientation control layer therebetween, and a second electrode overlying the piezoelectric layer. The piezoelectric layer is made of a complex oxide having a perovskite structure including an A site containing lead and a B site containing zirconium and titanium. The orientation control layer is made of a complex oxide having a perovskite structure including an A site containing lanthanum and a B site containing nickel and titanium.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: June 23, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Koichi Morozumi, Akira Kuriki, Ichiro Asaoka, Sayaka Kimura
  • Publication number: 20140368583
    Abstract: A liquid ejecting head includes a piezoelectric element including a first electrode, a piezoelectric layer overlying the first electrode with an orientation control layer therebetween, and a second electrode overlying the piezoelectric layer. The piezoelectric layer is made of a complex oxide having a perovskite structure including an A site containing lead and a B site containing zirconium and titanium. The orientation control layer is made of a complex oxide having a perovskite structure including an A site containing lanthanum and a B site containing nickel and titanium.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 18, 2014
    Inventors: Koichi MOROZUMI, Akira KURIKI, Ichiro ASAOKA, Sayaka KIMURA
  • Patent number: 8147041
    Abstract: A piezoelectric element includes a piezoelectric film containing lead (Pb), zirconium (Zr), and titanium (Ti). The piezoelectric film has a composition satisfying the relationship of Zr/(Ti+Zr)>Ti/(Ti+Zr) and has a polarization-electric field hysteresis loop having a Pm/2Pr of 1.95 or more and a Vc(?) of ?1.75 V or more, wherein Pm denotes saturation polarization, Pr denotes remanent polarization, and Vc(?) denotes a negative coercive electric field intensity.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: April 3, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Akira Kuriki, Koji Sumi, Tatsuo Sawasaki, Tatsuro Torimoto, Motoki Takabe
  • Patent number: 8003161
    Abstract: A method of manufacturing a dielectric film includes a coating step of coating sol made of an organic metal compound and forming a dielectric precursor film, a drying step of drying the dielectric precursor film, a degreasing step of degreasing the dielectric precursor film, and a baking step of baking the dielectric precursor film to form a dielectric film. The drying step includes a first drying step of drying the dielectric precursor film by heating the dielectric precursor film to a temperature lower than a boiling point of a solvent which is a main solvent of the sol and then holding the dielectric precursor film at the temperature for a predetermined period of time, and a second drying step of drying the dielectric precursor film further by reheating the dielectric precursor film and then holding the dielectric precursor film at the temperature for a predetermined period of time.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: August 23, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Akira Kuriki, Hironobu Kazama, Toshinao Shinbo, Koji Sumi
  • Patent number: 7887164
    Abstract: A piezoelectric layer is formed of a plurality of ferroelectric films containing lead (Pb), zirconium (Zr), and titanium (Ti) above a first electrode. A boundary portion between a first ferroelectric film closest to the first electrode and a second ferroelectric film formed above the first ferroelectric film has an area where the maximum value of a concentration of titanium with respect to zirconium is 80% or more.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: February 15, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Akira Kuriki
  • Patent number: 7878631
    Abstract: A piezoelectric layer held between a first electrode on a substrate side and a second electrode formed on a surface of the piezoelectric layer facing away from the first electrode is formed of a ferroelectric material with a perovskite crystal structure, and the ratio of the surface roughness of the piezoelectric layer to the surface roughness of the first electrode falls within the range of 0.58 to 1.60.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: February 1, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Akira Kuriki, Yuka Yonekura
  • Patent number: 7819508
    Abstract: A method for producing a dielectric film, comprising: a coating step of coating a colloidal solution containing an organometallic compound containing a metal constituting a dielectric film containing at least a lead component to form a dielectric precursor film; a drying step of drying the dielectric precursor film; a degreasing step of degreasing the dielectric precursor film; and a sintering step of sintering the dielectric precursor film to form a dielectric film, and wherein the drying step includes a first drying step of heating the dielectric precursor film to a temperature lower than the boiling point of a solvent, which is a main solvent of the material, and holding the dielectric precursor film at the temperature for a certain period of time to dry the dielectric precursor film, and a second drying step of drying the dielectric precursor film at a temperature in the range of 140° C. to 170° C., the degreasing step is performed at a degreasing temperature of 350° C. to 450° C.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: October 26, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akira Kuriki, Koji Sumi, Hironobu Kazama, Motoki Takabe, Motohisa Noguchi
  • Patent number: 7757362
    Abstract: A method for producing a dielectric film, comprising: a coating step of coating a colloidal solution containing an organometallic compound containing a metal constituting a dielectric film containing at least a lead component to form a dielectric precursor film; a drying step of drying the dielectric precursor film; a degreasing step of degreasing the dielectric precursor film; and a firing step of firing the dielectric precursor film to form a dielectric film, and wherein the drying step includes a first drying step of heating the dielectric precursor film to a temperature lower than the boiling point of a solvent, which is a main solvent of the material, and holding the dielectric precursor film at the temperature for a certain period of time to dry the dielectric precursor film, and a second drying step of drying the dielectric precursor film at a temperature in the range of 140° C., to 170° C., the degreasing step is performed at a degreasing temperature of 350° C. to 450° C.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: July 20, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akira Kuriki, Koji Sumi, Hironobu Kazama, Motoki Takabe, Motohisa Noguchi