Patents by Inventor Akira Mishima
Akira Mishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140337402Abstract: A method for efficiently carrying out an analysis and computation using mesh structures is disclosed. When an insulator is brought into contact with two conductors, the mesh structures are generated and a displacement current is analyzed. In the generated structures, the insulator is considered a three-dimensional mesh structure and at least a portion of the conductor brought into contact with the insulator is considered a three-dimensional structure whereas the other portions are taken as a one- or two-dimensional structures. In an alternative, the insulator is considered a three-dimensional structure and at least a portion of the conductor brought into contact with the insulator is considered a three-dimensional structure whereas the other portions are considered three- to one-dimensional structures. In the conductor, a short-circuit section with no mesh elements is provided between at least a portion brought into contact with the insulator and the other portions.Type: ApplicationFiled: November 14, 2011Publication date: November 13, 2014Applicant: Hitachi, Ltd.Inventors: Kazutami Tago, Nobuhiro Kusuno, Kiyomi Yoshinari, Akira Mishima
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Patent number: 8599530Abstract: Disclosed is an electromagnetic valve driving circuit capable of reducing a load of a booster circuit. A boost driving FET 202 is connected to a route formed between the booster circuit 100 and a first terminal of an injector 3. A battery-side driving FET 212 and a battery protection diode Db are connected to a route formed between a positive-polarity side of a power supply and the first terminal of the injector 3. A freewheeling diode Df is connected at a first terminal thereof to a portion between the first terminal of the injector 3 and the battery protection diode Db, and at a second terminal thereof to a grounding side of the power supply. An injector downstream-side driving FET 220 is connected to a route formed between the second terminal of the injector 3 and the grounding side of the power supply.Type: GrantFiled: February 25, 2011Date of Patent: December 3, 2013Assignee: Hitachi Automotive Systems, Ltd.Inventors: Kohei Onda, Ayumu Hatanaka, Akira Mishima, Takuya Mayuzumi, Fumiaki Nasu, Mitsuhiko Watanabe
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Patent number: 8514541Abstract: The present invention realizes an injector drive circuit capable of providing high output power of a boost convertor while suppressing increases in size and cost thereof. An injector energizing circuit 200 includes an FET 2 which applies a high voltage 100a generated by a boost convertor 100 to an injection valve 20. The boost convertor 100 includes an input side capacitor 103, a boosting FET 105, a boost coil 104, a boost diode 106, and FETs 108 and 109 provided in association with a negative pole of an output side capacitor 107. During a period in which the high voltage 100a is applied to the injection valve 20, a gate signal 108a of the FET 108 is turned ON and a gate signal 109a of the FET 109 is turned OFF. Consequently, the boosting FET 105 performs a switching operation to turn OFF the gate signal 108a of the FET 108 and turn ON the gate signal 109a of the FET 109 during a period for charging into the output side capacitor 107.Type: GrantFiled: February 24, 2011Date of Patent: August 20, 2013Assignee: Hitachi Automotive Systems, Ltd.Inventors: Ayumu Hatanaka, Akira Mishima, Takuya Mayuzumi, Mitsuhiko Watanabe, Fumiaki Nasu
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Patent number: 8515195Abstract: A remote editing system has a main editing apparatus configured to transmit, to a remote editing apparatus via a network, hierarchically encoded data that forms an image, the hierarchically encoded data belonging to a predetermined hierarchical level. The remote editing apparatus is configured to accept an editing operation using the hierarchically encoded data transmitted by the main editing apparatus to edit content of the hierarchically encoded data. The remote editing apparatus is further configured to request the main editing apparatus to transmit another hierarchically encoded data, and to generate edited image data using the another hierarchically encoded data transmitted by the main editing apparatus in compliance with the request.Type: GrantFiled: July 15, 2005Date of Patent: August 20, 2013Assignee: Sony CorporationInventors: Akira Mishima, Eisaburo Itakura
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Patent number: 8466549Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. The third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: GrantFiled: September 23, 2011Date of Patent: June 18, 2013Assignee: Renesas Electronics CorporationInventors: Kentaro Ochi, Akira Mishima, Takuro Kanazawa, Tetsuo Iijima, Katsuo Ishizaka, Norio Kido
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Patent number: 8198847Abstract: A brushless motor system which can suppress adverse influences of electromagnetic noise without increasing the size and enhancing the performance of a filter circuit. In a brushless motor system comprising a brushless motor, an inverter, and a direct current power source, a noise return line for returning a noise current is connected between the brushless motor and the inverter. The noise current is generated in the inverter and reaches the brushless motor. With the provision of the noise return line, a common mode current leaking from the brushless motor to a ground can be reduced.Type: GrantFiled: December 15, 2009Date of Patent: June 12, 2012Assignee: Hitachi, Ltd.Inventors: Tadahiko Chida, Akira Mishima, Nobuyasu Kanekawa
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Publication number: 20120012978Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. the third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: ApplicationFiled: September 23, 2011Publication date: January 19, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kentaro OCHI, Akira Mishima, Takuro Kanazawa, Tetsuo Iijima, Katsuo Ishizaka, Norio Kido
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Patent number: 8035222Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. the third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: GrantFiled: December 15, 2010Date of Patent: October 11, 2011Assignee: Renesas Electronics CorporationInventors: Kentaro Ochi, Akira Mishima, Takuro Kanazawa, Tetsuo Iijima, Katsuo Ishizaka, Norio Kido
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Publication number: 20110221268Abstract: Downsizing, cost reduction, and a low inductance of an input/output circuit are to be achieved with a power converter in which a multilayer board having a power semiconductor module 500 and busbars 11, 12 is modularized. The positive busbar 11 and the negative busbar 12 for feeding main circuit current are provided on a surface of the multilayer board 100 on which a control device 10a is mounted. The positive busbar 11 and the negative busbar 12 are formed to be thicker that the metal layer wiring in each layer of the multilayer board 100. The positive busbar 11 is electrically connected to the 2nth layer wiring (n represents a positive integer) from the positive surface wiring of the multilayer board 100, and the negative busbar 12 to the 2n+1th layer wiring opposite to the 2nth layer wiring of the multilayer board 100, through via holes. As a result, current flows into the power semiconductor module 500 in opposite directions through the 2nth layer wiring and the 2n+1th layer wiring.Type: ApplicationFiled: October 22, 2009Publication date: September 15, 2011Applicant: Hitachi, Ltd.Inventors: Takuro Kanazawa, Akira Mishima, Kentaro Ochi
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Publication number: 20110222202Abstract: Disclosed is an electromagnetic valve driving circuit capable of reducing a load of a booster circuit. A boost driving FET 202 is connected to a route formed between the booster circuit 100 and a first terminal of an injector 3. A battery-side driving FET 212 and a battery protection diode Db are connected to a route formed between a positive-polarity side of a power supply and the first terminal of the injector 3. A freewheeling diode Df is connected at a first terminal thereof to a portion between the first terminal of the injector 3 and the battery protection diode Db, and at a second terminal thereof to a grounding side of the power supply. An injector downstream-side driving FET 220 is connected to a route formed between the second terminal of the injector 3 and the grounding side of the power supply.Type: ApplicationFiled: February 25, 2011Publication date: September 15, 2011Applicant: Hitachi Automotive Systems, Ltd.Inventors: Kohei ONDA, Ayumu HATANAKA, Akira MISHIMA, Takuya MAYUZUMI, Fumiaki NASU, Mitsuhiko WATANABE
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Publication number: 20110220069Abstract: The present invention realizes an injector drive circuit capable of providing high output power of a boost convertor while suppressing increases in size and cost thereof. An injector energizing circuit 200 includes an FET 2 which applies a high voltage 100a generated by a boost convertor 100 to an injection valve 20. The boost convertor 100 includes an input side capacitor 103, a boosting FET 105, a boost coil 104, a boost diode 106, and FETs 108 and 109 provided in association with a negative pole of an output side capacitor 107. During a period in which the high voltage 100a is applied to the injection valve 20, a gate signal 108a of the FET 108 is turned ON and a gate signal 109a of the FET 109 is turned OFF. Consequently, the boosting FET 105 performs a switching operation to turn OFF the gate signal 108a of the FET 108 and turn ON the gate signal 109a of the FET 109 during a period for charging into the output side capacitor 107.Type: ApplicationFiled: February 24, 2011Publication date: September 15, 2011Applicant: Hitachi Automotive Systems, Ltd.Inventors: Ayumu HATANAKA, Akira Mishima, Takuya Mayuzumi, Mitsuhiko Watanabe, Fumiaki Nasu
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Patent number: 7989997Abstract: A control device for an electrically operated power steering system includes: a power substrate comprising a plurality of switching elements, that converts DC electrical current to AC electrical current by switching operation of the plurality of switching elements; an output terminal for transmitting the AC electrical current to an electric motor that generates steering torque; a conductor for electrically connecting the power substrate to the output terminal; a metallic chassis that holds the power substrate and the conductor, and supports the output terminal; and a metallic cover that faces the output terminal, and that is connected to the metallic chassis.Type: GrantFiled: May 28, 2009Date of Patent: August 2, 2011Assignee: Hitachi, Ltd.Inventors: Manabu Hashimoto, Akira Mishima, Kentaro Ochi, Takuro Kanazawa
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Publication number: 20110089558Abstract: There is provided a technology capable of reducing the mounting burden on the part of a customer which is a recipient of a package. Over a metal board, a single package and another single package are mounted together via an insulation adhesion sheet, thereby to form one composite package. As a result, as compared with the case where six single packages are mounted, the number of packages to be mounted is smaller in the case where three sets of the composite packages are mounted. This can reduce the mounting burden on the part of a customer.Type: ApplicationFiled: October 17, 2010Publication date: April 21, 2011Inventors: Akira MUTO, Akira Mishima, Takuro Kanazawa, Ochi Kentaro, Tetsuo Iijima, Katsuo Ishizaka
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Publication number: 20110084359Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. the third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: ApplicationFiled: December 15, 2010Publication date: April 14, 2011Inventors: Kentaro OCHI, Akira Mishima, Takuro Kanazawa, Tetsuo Iijima, Katsuo Ishizaka, Norio Kido
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Patent number: 7872348Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. the third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: GrantFiled: June 9, 2010Date of Patent: January 18, 2011Assignee: Renesas Electronics CorporationInventors: Kentaro Ochi, Akira Mishima, Takuro Kanazawa, Tetsuo Iijima, Katsuo Ishizaka, Norio Kido
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Publication number: 20100315786Abstract: A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a third lead. the third lead is arranged substantially in parallel to the inductive conductor. Leads at the joint portions have, for example, a bent structure, and the third lead is arranged to be close to the inductive conductor.Type: ApplicationFiled: June 9, 2010Publication date: December 16, 2010Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kentaro OCHI, Akira MISHIMA, Takuro KANAZAWA, Tetsuo IIJIMA, Katsuo ISHIZAKA, Norio KIDO
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Patent number: 7701159Abstract: A brushless motor system which can suppress adverse influences of electromagnetic noise without increasing the size and enhancing the performance of a filter circuit. In a brushless motor system comprising a brushless motor, an inverter, and a direct current power source, a noise return line for returning a noise current is connected between the brushless motor and the inverter. The noise current is generated in the inverter and reaches the brushless motor. With the provision of the noise return line, a common mode current leaking from the brushless motor to a ground can be reduced.Type: GrantFiled: April 27, 2006Date of Patent: April 20, 2010Assignee: Hitachi, Ltd.Inventors: Tadahiko Chida, Akira Mishima, Nobuyasu Kanekawa
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Publication number: 20100090630Abstract: A brushless motor system which can suppress adverse influences of electromagnetic noise without increasing the size and enhancing the performance of a filter circuit. In a brushless motor system comprising a brushless motor, an inverter, and a direct current power source, a noise return line for returning a noise current is connected between the brushless motor and the inverter. The noise current is generated in the inverter and reaches the brushless motor. With the provision of the noise return line, a common mode current leaking from the brushless motor to a ground can be reduced.Type: ApplicationFiled: December 15, 2009Publication date: April 15, 2010Applicant: HITACHI, LTD.Inventors: Tadahiko CHIDA, Akira MISHIMA, Nobuyasu KANEKAWA
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Patent number: RE41869Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.Type: GrantFiled: May 30, 2008Date of Patent: October 26, 2010Assignee: Renesas Electronics Corp.Inventors: Tetsuya Kawashima, Akira Mishima
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Patent number: RE43663Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.Type: GrantFiled: June 23, 2010Date of Patent: September 18, 2012Assignee: Renesas Electronics CorporationInventors: Tetsuya Kawashima, Akira Mishima