Abstract: A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2?(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2n-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle.

Abstract: A system and method is provided for using a point-on-load (“POL”) control unit to program and/or monitor a POL regulator. Specifically, in one embodiment of the present invention, a power supply controller is adapted to provide initial-configuration data to at least one POL regulator. A POL control unit (located within the POL regulator) then stores at least a portion of the initial-configuration data in a storage device and uses at least a portion of the initial-configuration data to produce an output. The POL control unit is further adapted to store fault-monitoring data in the storage device and provide at least a portion of the fault-monitoring data to the controller. If the provided portion violates a known parameter, the controller (or POL control unit) may respond by perform a particular action (e.g., disable the POL regulator, etc.).

Abstract: A power supply comprises at least one power switch adapted to convey power between input and output terminals of the power supply, and a digital controller adapted to control operation of the at least one power switch responsive to an output measurement of the power supply. The digital controller comprises an analog-to-digital converter providing a digital error signal representing a voltage difference between the output measurement and a reference value, a digital filter providing a digital control output based on a sum of previous error signals and previous control outputs, an error controller adapted to modify operation of the digital filter upon an error condition, and a digital pulse width modulator providing a control signal to the power switch having a pulse width corresponding to the digital control output.

Abstract: A system and method is provided for determining a voltage output of a programmable power converter based on programming voltage data received from one of a variety of alternate sources. Specifically, in one embodiment of the present invention, a control unit is adapted to monitor a digital data serial interface, a digital data parallel interface, and an analog data interface to determine whether programming voltage data has been received. If programming voltage data has been received, the data is used to determine an output voltage for the programmable power converter. If more than one set of programming voltage data has been received, a determination is made as to which set of data takes priority. The selected set of data is then used to determine an output voltage for the programmable power converter.

Abstract: A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate.

Abstract: A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.

Abstract: A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2?(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2n m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle.

Abstract: A power control system comprises a plurality of point-of-load (POL) regulators each adapted to convey regulated power to a load, a serial data bus operatively connecting the plurality of POL regulators, and a digital power manager connected to the data bus. The digital power manager includes a controller adapted to execute stored instructions to program operational parameters of the plurality of POL regulators via the serial data bus and receive monitoring data from the plurality of POL regulators via the serial data bus. The digital power manager further comprises a user interface, such as an I2C interface, adapted to receive programming data therefrom and send monitoring data thereto.

Abstract: A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.

Abstract: A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2?(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2n m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle.

Abstract: A switched mode power supply comprises a first switch coupled to an input power source, a second switch coupled to ground, and an output filter coupled to a phase node defined between the first and second switches. The first and second switches are responsive to a pulse width modulated signal to thereby regulate power provided to the output filter. A controller is provided in a feedback loop that monitors operation of the first and second switches and delays activation of one of the first and second switches to preclude simultaneous conduction. The controller comprises at least one delay control circuit adapted to delay delivery of the pulse width modulated signal to at least one of the first and second switches. The delay control circuit detects a phase difference between state transitions of the first and second switches and provides a delay corresponding to a magnitude of the phase difference.

Abstract: A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate.

Abstract: A system and method is provided for using a serial bus to communicate (either passively or actively) with a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) communicates with at least one POL regulators by writing and/or reading data (either synchronously or asynchronous) over a unidirectional or bi-directional serial bus. In one embodiment of the present invention, the controller is adapted to write initial-configuration data (e.g., output voltage set-point, current limit set-point, etc.) to at least one POL regulator via the serial bus. At least a portion of the initial-configuration data is then used by the POL regulator to produce a particular output. In another embodiment of the invention, each POL regulator includes at least one register for maintaining POL information, such as unique identification information, fault protection information, output voltage set-point data, current limit set-point data, etc.

Abstract: A system and method is provided for using a serial bus to communicate (either passively or actively) with a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) communicates with at least one POL regulators by writing and/or reading data (either synchronously or asynchronous) over a unidirectional or bi-directional serial bus. In one embodiment of the present invention, the controller is adapted to write initial-configuration data (e.g., output voltage set-point, current limit set-point, etc.) to at least one POL regulator via the serial bus. At least a portion of the initial-configuration data is then used by the POL regulator to produce a particular output. In another embodiment of the invention, each POL regulator includes at least one register for maintaining POL information, such as unique identification information, fault protection information, output voltage set-point data, current limit set-point data, etc.

Abstract: A system and method is provided for utilizing output-timing data to control at least one output timing parameter of a point-of-load (“POL”) regulator. Specifically, a power supply controller (“controller”) is adapted to transmit output-timing data to at least one POL regulator. In one embodiment of the present invention, each POL regulator includes an output builder, a control unit and a storage device. The control unit is adapted to store the output-timing data in the storage device. The control unit and the output builder are then adapted to produce an output having at least one output timing parameter in accordance with the output-timing data. Examples of output-timing data include sequencing data, turn-on data, turn-off data, termination data, slew-rate data, etc. For example, a POL regulator may be adapted to utilize output-timing data, or a portion thereof (e.g., slew-rate data), to generate an output having a particular slew rate.

Abstract: A power supply comprises at least one power switch adapted to convey power between input and output terminals of the power supply, and a digital controller adapted to control operation of the at least one power switch responsive to an output measurement of the power supply. The digital controller comprises an analog-to-digital converter providing a digital error signal representing a difference between the output measurement and a reference value, a digital filter providing a digital control output based on a sum of previous error signals and previous control outputs, an error controller adapted to modify operation of the digital filter upon an error condition, and a digital pulse width modulator providing a control signal to the power switch having a pulse width corresponding to the digital control output.

Abstract: A power control system comprises a plurality of power control groups, with each group comprising a plurality of individual point-of-load regulators each adapted to provide respective regulated voltage outputs. The point-of-load regulators may be selected for inclusion in a power control groups based on characteristics of loads supplied by the point-of-load regulators. An intermediate bus controller is coupled to each of said power control groups through a serial data bus interface common to each group and an OK status line for each respective group. A front end regulator provides an intermediate bus voltage to each of the plurality of power control groups and to the intermediate bus controller. The plurality of point-of-load regulators of each group each further comprises a respective fault manager adapted to detect fault conditions and selectively communicate notifications of the fault conditions to other ones of the plurality of point-of-load regulators of the group and to the intermediate bus controller.

Abstract: A switched mode power supply comprises a first switch coupled to an input power source, a second switch coupled to ground, and an output filter coupled to a phase node defined between the first and second switches. The first and second switches are responsive to a pulse width modulated signal to thereby regulate power provided to the output filter. A controller is provided in a feedback loop that monitors operation of the first and second switches and delays activation of one of the first and second switches to preclude simultaneous conduction. The controller comprises at least one delay control circuit adapted to delay delivery of the pulse width modulated signal to at least one of the first and second switches. The delay control circuit detects a phase difference between state transitions of the first and second switches and provides a delay corresponding to a magnitude of the phase difference.

Abstract: A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2?(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2n m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle.

Abstract: A switched mode power supply comprises at least one power switch adapted to convey power between input and output terminals of the power supply, and a digital controller adapted to control operation of the at least one power switch responsive to an output parameter of the power supply. The digital controller comprises an analog-to-digital converter providing a digital error signal representing a difference between the output parameter and a reference value, a digital filter providing a digital control output based on a sum of current and previous error signals and previous control outputs, the error signals comprising integers having a relatively low numerical range and said control outputs comprising integers having a relatively high numerical range, and a digital pulse width modulator providing a control signal to the power switch having a pulse width corresponding to the digital control output.