Patents by Inventor Alain Cousin

Alain Cousin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8928121
    Abstract: The present invention relates to a method for thermal stress reduction on a wafer, comprising the steps of providing a patterned wafer with saw lanes between adjacent dies, forming thin holes within the silicon substrate, which holes create a dotted groove in the saw lanes, and wherein no second layer on an opposing side of the wafer is formed, a patterned wafer obtained by said method. The forming of the holes is preferably combined with other processing steps or another step to avoid additional operations and manipulations prior to, or after standard wafer processing, and it therefore optimizes fabrication quality and costs. Preferably the holes within the silicon substrate having a depth of more than 3 to 50 ?m, preferably from 5-40 ?m, like 20 ?m.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 6, 2015
    Assignee: NXP B.V.
    Inventor: Alain Cousin
  • Patent number: 7961478
    Abstract: In an example embodiment, an integrated circuit comprises an on-chip electronic component. The on-chip electronic component has an active surface in a hermetically sealed cavity and a cover to hermetically seal the cavity. There is an additional electronic component wherein the additional electronic component is fixed on the cover.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: June 14, 2011
    Assignee: NXP B.V.
    Inventor: Alain Cousin
  • Publication number: 20100258916
    Abstract: The present invention relates to a method for thermal stress reduction on a wafer, comprising the steps of providing a patterned wafer with saw lanes between adjacent dies, forming thin holes within the silicon substrate, which holes create a dotted groove in the saw lanes, and wherein no second layer on an opposing side of the wafer is formed, a patterned wafer obtained by said method. The forming of the holes is preferably combined with other processing steps or another step to avoid additional operations and manipulations prior to, or after standard wafer processing, and it therefore optimizes fabrication quality and costs. Preferably the holes within the silicon substrate having a depth of more than 3 to 50 ?m, preferably from 5-40 ?m, like 20 ?m.
    Type: Application
    Filed: November 7, 2008
    Publication date: October 14, 2010
    Applicant: NXP B.V.
    Inventor: Alain Cousin
  • Publication number: 20070274058
    Abstract: In an example embodiment, an integrated circuit comprises an on-chip electronic component. The on-chip electronic component has an active surface in a hermetically sealed cavity and a cover to hermetically seal the cavity. There is an additional electronic component wherein the additional electronic component is fixed on the cover.
    Type: Application
    Filed: April 4, 2005
    Publication date: November 29, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTRONIC N.V.
    Inventor: Alain Cousin
  • Patent number: 4174841
    Abstract: A record player motor is stopped by the detection of a magnetic field related to the movement of a pick-up arm by means of a Hall-effect cell, and is started by the influence of another magnetic field acting on the same Hall effect cell. A control circuit ensures that start and stop signals supplied by the Hall-effect cell are discriminated and supplied to start and stop switches respectively.
    Type: Grant
    Filed: August 7, 1978
    Date of Patent: November 20, 1979
    Assignee: U.S. Philips Corporation
    Inventor: Alain Cousin
  • Patent number: 4007327
    Abstract: Apparatus for treatment of luminance and/or color data included in information representative of an image to be displayed in a visual display system, comprising a comparator for comparing the data with at least one reference datum defined upon a scale of level possible variations and a device for switching the levels of the data according to the positioning in relation to each reference datum to lead to a precise analysis of the displayed image.
    Type: Grant
    Filed: July 30, 1975
    Date of Patent: February 8, 1977
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel
    Inventor: Alain Cousin
  • Patent number: 3961324
    Abstract: A device for displaying distinct pictures on n receiver screens of the television type comprising n+1 picture maintaining memories which can be connected to the n receivers through n switches and a monitoring element ensuring the charging of the memory which has not been read during the reading of the n memories.
    Type: Grant
    Filed: March 5, 1975
    Date of Patent: June 1, 1976
    Assignee: Compagnie Industrielle des Telecommunications Cit-Alcatel
    Inventors: Alain Cousin, Henri Berard