Patents by Inventor Alain Rivard

Alain Rivard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11466424
    Abstract: A bracket for mounting an excavation bucket on a coupler of an articulated arm. The bracket comprises a body extending in a plane and having a central portion. A first concavity on a first side of the body substantially has an arc-of-circle shape to conform with a surface of a cylinder and hinge therearound. The bracket comprises a second concavity on a second side of the body opposite the first side with respect to the central portion. A third concavity on the second side of the body substantially has the arc-of-circle shape. The bracket comprises a first abutment edge formed by the central portion of the body; and a second abutment edge aside the first abutment edge and further from the central portion of the body compared to the first abutment edge. This bracket allows reversible mounting of the coupler of the excavation bucket.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: October 11, 2022
    Assignee: GROUP R.Y. BEAUDOIN INC.
    Inventors: Rémi Beaudoin, Alain Rivard, Luc D'Amours
  • Publication number: 20210270007
    Abstract: There is described a bracket for mounting an excavation bucket on a coupler of an articulated arm. The bracket comprises a body extending in a plane and having a central portion. This bracket allows reversible mounting of the coupler of the excavation bucket by providing two pairs of adjacent concavities at a front and at a rear portion of the body which can alternately hold a corresponding pair of hinge shafts of a coupler in either orientation. Abutments at the front and at the rear are provided to further retain the coupler in the mounting bracket in either configuration. A bottom of the mounting bracket comprises notches that fit with corresponding portions of the bucket for improved securing of the bucket assembly on the mounting bracket.
    Type: Application
    Filed: April 14, 2021
    Publication date: September 2, 2021
    Inventors: Luc D'AMOURS, Alain RIVARD, Rémi BEAUDOIN
  • Publication number: 20190106858
    Abstract: There is described a bracket for mounting an excavation bucket on a coupler of an articulated arm. The bracket comprises a body extending in a plane and having a central portion. A first concavity on a first side of the body substantially has an arc-of-circle shape to conform with a surface of a cylinder and hinge therearound. A second concavity on a second side of the body is provided opposite the first side with respect to the central portion. A third concavity on the second side of the body substantially has the arc-of-circle shape. There are provided a first abutment edge formed by the central portion of the body; and a second abutment edge aside the first abutment edge and further from the central portion of the body compared to the first abutment edge. This bracket allows reversible mounting of the coupler of the excavation bucket.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 11, 2019
    Inventors: Rémi BEAUDOIN, Alain RIVARD, Luc D'AMOURS
  • Patent number: 7694312
    Abstract: A method and system for interconnecting peripherals, processor nodes, and hardware devices to a data network to produce a network bus providing OS functionality for managing hardware devices connected to the network bus involves defining a network bus driver at each of the processor nodes that couples hardware device drivers to a network hardware abstraction layer of the processor node. The network bus can be constructed to account for the hot-swappable nature of the hardware devices using a device monitoring function, and plug and play functionality for adding and, removing device driver instances. The network bus can be used to provide a distributed processing system by defining a shared memory space at each processor node. Distributed memory pages are provided with bus-network-wide unique memory addresses, and a distributed memory manager is added to ensure consistency of the distributed memory pages, and to provide a library of functions for user mode applications.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: April 6, 2010
    Assignee: Pleora Technologies Inc.
    Inventors: Alain Rivard, Martin Dubois
  • Patent number: 7383425
    Abstract: This invention is directed to a method and apparatus for providing low, predictable latencies in processing IP packets. The apparatus provides a specialized microprocessor or hardwired circuitry to process IP packets for video communications and control of the video source without an operating system. The method relates to operation of a microprocessor which is suitably arranged to carry out the steps of the method. The method includes details of operation of the specialized microprocessor.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: June 3, 2008
    Assignee: Pleora Technologies Inc.
    Inventors: Eric Boisvert, Alain Rivard, George Chamberlain
  • Publication number: 20060059287
    Abstract: A method and system for interconnecting peripherals, processor nodes, and hardware devices to a data network to produce a network bus providing OS functionality for managing hardware devices connected to the network bus involves defining a network bus driver at each of the processor nodes that couples hardware device drivers to a network hardware abstraction layer of the processor node. The network bus can be constructed to account for the hot-swappable nature of the hardware devices using a device monitoring function, and plug and play functionality for adding and, removing device driver instances. The network bus can be used to provide a distributed processing system by defining a shared memory space at each processor node. Distributed memory pages are provided with bus-network-wide unique memory addresses, and a distributed memory manager is added to ensure consistency of the distributed memory pages, and to provide a library of functions for user mode applications.
    Type: Application
    Filed: September 10, 2004
    Publication date: March 16, 2006
    Applicant: PLEORA TECHNOLOGIES INC.
    Inventors: Alain Rivard, Martin Dubois
  • Publication number: 20050086352
    Abstract: This invention is directed to a method and apparatus for providing low, predictable latencies in processing IP packets. The apparatus provides a specialized microprocessor or hardwired circuitry to process IP packets for video communications and control of the video source without an operating system. The method relates to operation of a microprocessor which is suitably arranged to carry out the steps of the method. The method includes details of operation of the specialized microprocessor.
    Type: Application
    Filed: February 27, 2004
    Publication date: April 21, 2005
    Inventors: Eric Boisvert, Alain Rivard, George Chamberlain
  • Publication number: 20050068951
    Abstract: This invention relates in general to data communications, and in particular, to the delivery of video over a data network. It discloses a communications protocol for use with high performance imaging systems networks providing multi-point-to-multi-point connection between the video sources and the receiving host. The protocol is useful for imaging systems that deliver all the video information reliability in real time to the receiving host.
    Type: Application
    Filed: February 27, 2004
    Publication date: March 31, 2005
    Inventors: Alain Rivard, Eric Boisvert, George Chamberlain