Patents by Inventor Alakesh Chetia

Alakesh Chetia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8060708
    Abstract: A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: November 15, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Herve Letourneur, Donald W. Smith, Manoj Gujral
  • Publication number: 20100312952
    Abstract: A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 9, 2010
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Hervé Letourneur, Donald W. Smith, Manoj Gujral
  • Patent number: 7730268
    Abstract: A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: June 1, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Hervé Letourneur, Donald W. Smith, Manoj Gujral
  • Publication number: 20080046638
    Abstract: A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request.
    Type: Application
    Filed: August 18, 2006
    Publication date: February 21, 2008
    Applicant: CYPRESS SEMICONDUCTOR CORP.
    Inventors: Dinesh Maheshwari, Dinesh Ramanathan, Alakesh Chetia, Herve Letourneur, Donald W. Smith, Manoj Gujral
  • Publication number: 20050049765
    Abstract: Advertisements or other announcements are transmitted from a head end to a user through a Global Positioning System (GPS) enabled or other location-aware portable device. The device also transmits locational and temporal information back to the head end. The system gathers data pertaining to the effectiveness of advertisements being communicated to the user, for example, it can be determined if the user visited the advertised business premises after listening to or watching a particular advertisement. Such gathered data allows advertisers to measure the direct impact of their advertisements.
    Type: Application
    Filed: April 2, 2004
    Publication date: March 3, 2005
    Applicant: Sacagawea21 Inc.
    Inventors: Alakesh Chetia, Sujalendu Das, Gary Smerdon