Patents by Inventor Alan D. Poeppleman

Alan D. Poeppleman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6128760
    Abstract: Apparatus and an associated method calculates a CRC remainder for a block of data, such as a block of data retrieved from a CD-ROM device. CRC calculations are performed to provide assurances of data integrity subsequent to error corrections of the block of data. CRC remainders associated with N powers of two are stored in the look-up table. When calculating the CRC remainder, selected values stored in the look-up table are retrieved and combined to form the CRC remainder for the block of data.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: October 3, 2000
    Assignee: LSI Logic Corporation
    Inventors: Alan D. Poeppleman, Mark D. Rutherford
  • Patent number: 5983017
    Abstract: A virtual monitor controller includes a data storage device coupled to receive and output data; an instruction storage device coupled to receive and output instructions; a status storage device coupled to receive and output status data; and a mode storage device coupled to receive and output mode data. The virtual monitor controller is included in a debugger/monitor controller. A debugger/monitor system comprises a host system; the debugger/monitor controller; and a digital processor. Preferably, the controller is coupled between the processor and IC logic. A method of operating a virtual monitor comprises the steps of intercepting an instruction fetch from a microprocessor; downloading instructions from a host computer; and operating the microprocessor with the instructions. Preferably, the instructions are sequentially downloaded.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: November 9, 1999
    Assignee: LSI Logic Corporation
    Inventors: Steven R. Kemp, Clifford A. Whitehill, Alan D. Poeppleman
  • Patent number: 5598443
    Abstract: A digital data separator is provided for separating clock information and data from a data stream which is subject to varying amounts of undesired jitter which tend to corrupt the data. A read data window of controlled duration is generated for sampling the input data. The current best estimate of the duration of the read data window is stored in a period register as a period register value. The period register value minus one is loaded into a time register as the time register value. A count down cycle is performed by subtracting a value of one from the time register value in each clock cycle during the course of the count down cycle. The read data window is toggled to begin a new read data window when the time register value is near zero, the value remaining in the time register being designated the remaining value.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: January 28, 1997
    Assignees: AT&T Global Information Solutions Company (aka NCR Corporation), Hyundai Electronics America, Symbios Logic Inc.
    Inventor: Alan D. Poeppleman